|Key Input Parameter||Key Output Signal||Recommended Device|
|SPI or I2C
communication to set Frequency, Phase and Amplitude,
GPI trigger to trigger the Sine Wave
|Sine wave with a set frequency, phase and amplitude||DAC63204, DAC53204, DAC43204, DAC63004, DAC53004, DAC63202, DAC53202, DAC63002, DAC53002|
Objective: Sine wave generation using a smart DAC.
This design uses the internal function generation feature of the DAC63204, DAC53204, and DAC43204 (DACx3204) to generate a sine wave of a particular frequency, phase, and amplitude. The DACx3204 output cycles through 24 fixed DAC codes with variable slew times and gain settings to generate the sine wave. The DAC is used in voltage-output mode with the force sense outputs shorted close to the device. The DACx3204 has a general-purpose input/output (GPIO) pin which can be configured as an input pin to start and stop the sine wave using an external trigger. All register settings are saved using the integrated non-volatile memory (NVM), enabling the device to be used without run-time software, even after a power cycle or reset. This circuit can be used in grid infrastructure applications that use a built-in self-test that requires a sine wave or 3-phase sine wave as a test input, or building automation applications such as gas detectors that use a modulated reference to avoid DC shifts and noise reduction.
|Sequence||12-Bit Value||Sequence||12-Bit Value|
|0 (0° phase start)||0x800||12||0x800|
|4||0xD8B||16 (240° phase start)||0x275|
|6 (90° phase start)||0xE66||18||0x19A|
|8 (120° phase start)||0xD8B||20||0x275|
Where SLEW-RATE is the time period per step (s/step) selected in the SLEW-RATE field of the DAC-X-FUNC-CONFIG register. SLEW-RATE in s/step is multiplied by the 24 steps to get the period of the sine wave in seconds.
The peak-to-peak amplitude of the sine wave is calculated in units of peak-to-peak voltage (Vpp) with:
This schematic is used for the following design results of the DAC63204. The VOUTX and Trigger Input signals are measured on an oscilloscope at the test points marked on the schematic.
An excel-based calculator tool, DACX3X0X-SINEWAVE-CALC, is available to visualize the sine-wave generation feature on the DACx3x04 family of devices as well as generate the pseudocode required for a sine wave of a particular frequency and phase. The calculator tool shows the configuration settings used for each example in the design results.
Use the excel calculator to configure the DAC63204 to generate a sine wave with a 1-kHz frequency, 0° phase, and the internal reference:
The nearest valid SLEW-RATE setting is 40.48 μs.
This actual frequency using this slew rate value is:
The peak-to-peak amplitude of this sine wave is:
Use the excel calculator to configure the DAC63204 to generate a sine wave with a 1-kHz frequency, 0° phase, and VDD as the reference:
The peak-to-peak amplitude of this sine wave is:
Use the excel calculator to configure the DAC63204 to generate a sine wave with a 1-kHz frequency, and the internal reference. Each channel is configured for a different phase. Channel 1 uses 90° phase:
The following table shows an example register map for this application. The values given here are for the design choices made in the Sine Wave Generation with Four Output Channels section.
|Register Address||Register Name||Setting||Description|
| 0b0: Write 0b0 to set the window-comparator output to a non-latching output|
| 0b0: Device not locked|
| 0b0: Fault-dump read enable at address 0x00|
| 0b0: Disables the internal reference|
|[11:10] 0b00: Powers up VOUT3|
| 0b1: Powers down IOUT3|
|[8:7] 0b00: Powers up VOUT2|
| 0b1: Powers down IOUT2|
|[5:4] 0b00: Powers up VOUT1|
| 0b1: Powers down IOUT1|
|[2:1] 0b00: Powers up VOUT0|
| 0b1: Powers down IOUT0|
| 0b0: Glitch filter disabled for GP input|
| 0b0: Don't care|
| 0b0: Disable output mode for GPIO pin|
|[12:9] 0b0000: Selects the STATUS function setting mapped to GPIO as output|
|[8:5] 0b1111: Enables GPI function on all channels|
|[4:1] 0b1000: GP input configured to start or stop the function generator|
| 0b1: Enables input mode for GPIO pin|
|[15:12] 0b0000: Write 0b0101 to unlock the device|
|[11:8] 0b0000: Write 0b1010 to trigger a POR reset|
| 0b0: LDAC is not triggered|
| 0b0: DAC clear is not triggered|
| 0b0: Don't care|
| 0b0: Fault-dump is not triggered|
| 0b0: PROTECT function not triggered|
| 0b0: Fault-dump read not triggered|
| 0b1: Write 0b1 to store applicable register settings to the NVM|
| 0b0: NVM reload not triggered. Write 0b1 to reload applicable registers with existing NVM settings|
|DAC-X-VOUT-CMP-CONFIG||0x0400||[15:13] 0b000: Don't care|
|[12:10] 0b001: Selects VDD as reference with 1× gain|
[9:5] 0x00: Don't care
 0b0: Set OUTx pins as push-pull in comparator mode
| 0b0: Comparator output consumed internally|
| 0b0: FBx input has high-impedance in comparator mode|
| 0b0: Comparator output not inverted|
| 0b0: Disable comparator mode|
|0x06, 0x0C, 0x12, 0x18||DAC-X-FUNC-CONFIG||0x1C06, 0x0406, 0x0C06, 0x1406|| 0b0: DAC-X clear mode set to zero-scale|
| 0b0: DAC-X output updates immediately after a write command|
| 0b0: Do not update DAC-X with broadcast command|
|[12:11] 0b11, 0b00, 0b01, 0b10: Selects 90°, 0°, 120°, and 240° phase for output channels 0 to 3 respectively|
|[10:8] 0b100: Selects sine wave mode|
| 0b0: Enable linear slew|
|[6:4] 0b000: Selects CODE-STEP setting|
|[3:0] 0x00: Selects SLEW-RATE setting|
The following shows a pseudocode sequence to program the initial register values to the NVM of the DAC63204. The values given here are for the design choices made in the Sine Wave Generation with Four Output Channels section.
Pseudocode Example for DAC63204 4-Channel Sine Wave Generation
1: //SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA> 2: //Power-up voltage output on all channels, internal reference disabled 3: WRITE GENERAL_CONFIG(0x1F), 0x02, 0x49 4: //Configure Channel 0 with Gain=1x and VDD as reference 5: WRITE DAC-0-VOUT-CMP-CONFIG(0x03),0x04,0x00 6: //Configure Channel 1 with Gain=1x and VDD as reference 7: WRITE DAC-1-VOUT-CMP-CONFIG(0x09),0x04,0x00 8: //Configure Channel 2 with Gain=1x and VDD as reference 9: WRITE DAC-2-VOUT-CMP-CONFIG(0x0F),0x04,0x00 10: //Configure Channel 3 with Gain=1x and VDD as reference 11: WRITE DAC-3-VOUT-CMP-CONFIG(0x15),0x04,0x00 12: //Configure GPIO for input and start stop function generation 13: WRITE GPIO_CONFIG(0x24), 0x01, 0xF3 14: //Configure Channel 0 for sine wave generation with 90° phase selection 15: WRITE DAC-0-FUNC-CONFIG(0x06), 0x1C, 0x06 16: //Configure Channel 1 for sine wave generation with 0° phase selection 17: WRITE DAC-1-FUNC-CONFIG(0x0C), 0x04, 0x06 18: //Configure Channel 2 for sine wave generation with 120° phase selection 19: WRITE DAC-2-FUNC-CONFIG(0x12), 0x0C, 0x06 20: //Configure Channel 3 for sine wave generation with 240° phase selection 21: WRITE DAC-3-FUNC-CONFIG(0x18), 0x14, 0x06 22: //Program NVM with the above settings 23: WRITE COMMON-TRIGGER(0x20),0x00,0x02 24: //Start and Stop the sine wave using the GPIO pin or writing to
|DAC43204||4-channel, 8-bit, VOUT and IOUT smart DAC with I2C, SPI, and Hi-Z out during power off||DAC43204|
|DAC53204||4-channel, 10-bit, VOUT and IOUT smart DAC with I2C, SPI, and Hi-Z out during power off||DAC53204|
|DAC63204||4-channel, 12-bit, VOUT and IOUT smart DAC with I2C, SPI, and Hi-Z out during power off||DAC63204|
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