This document contains information for the INA30x-Q1 (INA302-Q1 and INA303-Q1 in TSSOP-14 package) to aid in a functional safety system design. Information provided are:
Figure 1-1 shows the device functional block diagram for reference.
The INA30x-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.
This section provides Functional Safety Failure In Time (FIT) rates for the INA30x-Q1 based on two different industry-wide used reliability standards:
FIT IEC TR 62380 / ISO 26262 | FIT (Failures Per 109 Hours) |
---|---|
Total Component FIT Rate | 10 |
Die FIT Rate | 2 |
Package FIT Rate | 8 |
The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:
Table | Category | Reference FIT Rate | Reference Virtual TJ |
---|---|---|---|
4 | BICMOS Op Amp, Comparators, Voltage Monitors | 8 FIT | 45°C |
The Reference FIT Rate and Reference Virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.
The failure mode distribution estimation for the INA30x-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
Die Failure Modes | Failure Mode Distribution (%) |
---|---|
VOUT open (Hi-Z) | 10% |
VOUT Stuck (High/Low) | 25% |
VOUT functional, not in specification | 25% |
ALERT false trip, failure to trip | 40% |
The FMD in Table 3-1 excludes short circuit faults across the isolation barrier. Faults for short circuit across the isolation barrier can be excluded according to ISO 61800-5-2:2016 if the following requirements are fulfilled:
Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance.
This section provides a Failure Mode Analysis (FMA) for the pins of the INA30x-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality |
B | No device damage, but loss of functionality |
C | No device damage, but performance degradation |
D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the INA30x-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the INA30x-Q1 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
VS | 1 | Power supply shorted to ground | B |
OUT | 2 | Output shorts to ground. When left in this configuration for a long time, under high supplies self heating could cause dice junction temperature to exceed 150 degrees Celsius. | B |
LIMIT1 | 3 | ALERT1 output is stuck low | B |
REF | 4 | Comparators and analog output will be unpredictable. | B |
GND | 5 | Normal Operation | D |
LATCH1 | 6 | If intended connection is not GND, functionality will be affected. | D if LATCH1=GND by design; B otherwise |
LATCH2 | 7 | If intended connection is not GND, functionality will be affected. | D if LATCH2=GND by design; B otherwise |
NC | 8 | Normal Operation | D |
LIMIT2 | 9 | ALERT2 output is stuck (low for INA302-q1; high for INA303-q1) | B |
DELAY | 10 | ALERT2 may not trip | B |
ALERT2 | 11 | ALERT2 output is stuck low | B |
ALERT1 | 12 | ALERT1 output is stuck low | B |
IN- | 13 | In high-side configuration, a short from the bus supply to GND will occur. High current will flow from bus supply to ground. In low side configuration, normal operation | B for High side or D for low side |
IN+ | 14 | In high-side configuration, a short from the bus supply to GND will occur. High current will flow from bus supply to ground. In low side configuration, input pins are shorted. | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
VS | 1 | No power supply to device. Device may be biased through inputs. Output will be close to GND. | B |
OUT | 2 | Output can be left open, there is no effect on the IC.. | D |
LIMIT1 | 3 | Comparator threshold is not defined. | B |
REF | 4 | Comparators and analog output will be unpredictable. | B |
GND | 5 | GND is floating. Output will be incorrect as it is no longer referenced to GND. | B |
LATCH1 | 6 | Comparator1 mode is not defined. | B |
LATCH2 | 7 | Comparator2 mode is not defined. | B |
NC | 8 | Normal Operation | D |
LIMIT2 | 9 | Comparator threshold is not defined. | B |
DELAY | 10 | Delay time is not well defined | B |
ALERT2 | 11 | Pin can be left open if not needed | D |
ALERT1 | 12 | Pin can be left open if not needed | D |
IN- | 13 | Differential input voltage is not well defined. | B |
IN+ | 14 | Differential input voltage is not well defined. | B |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|---|
VS | 1 | OUT | Output shorts to supply. When left in this configuration for a long time, under high supplies self heating could cause dice junction temperature to exceed 150 degrees Celsius. | B |
OUT | 2 | LIMIT1 | Comparators and analog output will be unpredictable. | B |
LIMIT1 | 3 | REF | Comparators and analog output will be unpredictable. | B |
REF | 4 | GND | Comparators and analog output will be unpredictable. | B |
GND | 5 | LATCH1 | LATCH1 short to GND. | D if LATCH1=GND by design; B otherwise |
LATCH1 | 6 | LATCH2 | Normal Operation if LATCH1=LATCH2 by design, otherwise comparators operation is unpredictable. | D if LATCH1=LATCH2 by design; B otherwise |
LATCH2 | 7 | NC | Normal Operation. | D |
NC | 8 | LIMIT2 | Normal Operation. | D |
LIMIT2 | 9 | DELAY | Neither the threshold or delay of comparator2 is well defined. Comparator2 will not function properly. | B |
DELAY | 10 | ALERT2 | Delay of ALERT2 is unpredictable. | B |
ALERT2 | 11 | ALERT1 | ALERT1 and ALERT2 are shorted and neither will function properly. | B |
ALERT1 | 12 | IN- | In high-side configuration, device could be damaged. In low side configuration, ALERT1 pin is stuck to ground. | A for High side or B for low side |
IN- | 13 | IN- | Input differential voltage=0V | C |
IN+ | 14 | IN+ | In high-side configuration, a short from the bus supply to VS will occur. High current will flow from bus supply to VS or vice versa. Device could be damaged. | A for High side or B for low side |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
VS | 1 | Normal operation. | D |
OUT | 2 | Output shorts to supply. When left in this configuration for a long time, under high supplies self heating could cause dice junction temperature to exceed 150 degrees Celsius. | B |
LIMIT1 | 3 | ALERT1 is stuck high or unpredictable. | B |
REF | 4 | Comparators and analog output will be unpredictable. | D if REF=VS by design; B otherwise |
GND | 5 | Power supply shorted to GND | B |
LATCH1 | 6 | Comparator1 in Latch mode. | D if LATCH1=VS by design; B otherwise |
LATCH2 | 7 | Comparator2 in Latch mode. | D if LATCH2=VS by design; B otherwise |
NC | 8 | Normal Operation. | D |
LIMIT2 | 9 | ALERT2 output is stuck (high for INA302-q1; low for INA303-q1). | B |
DELAY | 10 | Minimum Alert2 delay. | C |
ALERT2 | 11 | ALERT2is stuck high. | B |
ALERT1 | 12 | ALERT1is stuck high. | B |
IN- | 13 | In high-side configuration, a short from the bus supply to VS will occur. High current will flow from bus supply to VS or vice versa. Device could be damaged. | A for High side or B for low side |
IN+ | 14 | In high-side configuration, a short from the bus supply to VS will occur. High current will flow from bus supply to VS or vice versa. Device could be damaged. | A for High side or B for low side |
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