• Menu
  • Product
  • Email
  • PDF
  • Order now

  • TS3A27518E-Q1Functional Safety FIT Rate, FMD and Pin FMA

    • SCDA025 September   2022 TS3A27518E-Q1

       

  • CONTENTS
  • SEARCH
  • TS3A27518E-Q1Functional Safety FIT Rate, FMD and Pin FMA
  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 TSSOP-24 Package
    2. 2.2 QFN-24 Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 TSSOP-24 Package
    2. 4.2 QFN-24 Package
  6. IMPORTANT NOTICE
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

FUNCTIONAL SAFETY FIT RATE, FMD AND PIN-FMA

TS3A27518E-Q1Functional Safety FIT Rate, FMD and Pin FMA

Trademarks

All trademarks are the property of their respective owners.

1 Overview

This document contains information for TS3A27518E-Q1 (TSSOP-24 and QFN-24 package) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device

Figure 1-1 shows the device functional block diagram for reference.

GUID-9EA10218-DA10-48B8-AB96-2A0EB9D690E2-low.gif Figure 1-1 Functional Block Diagram

TS3A27518E-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

2 Functional Safety Failure In Time (FIT) Rates

2.1 TSSOP-24 Package

This section provides Functional Safety Failure In Time (FIT) rates for TSSOP-24 package of TS3A27518E-Q1 based on two different industry-wide used reliability standards:

  • Table 2-1 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
  • Table 2-2 provides FIT rates based on the Siemens Norm SN 29500-2
Table 2-1 Component Failure Rates per IEC TR 62380 / ISO 26262 Part 11
FIT IEC TR 62380 / ISO 26262 FIT (Failures Per 109 Hours)
Total Component FIT Rate 16
Die FIT Rate 2
Package FIT Rate 14

The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:

  • Mission Profile: Motor Control from Table 11
  • Power dissipation: 50 mW
  • Climate type: World-wide Table 8
  • Package factor (lambda 3): Table 17b
  • Substrate Material: FR4
  • EOS FIT rate assumed: 0 FIT
Table 2-2 Component Failure Rates per Siemens Norm SN 29500-2
Table Category Reference FIT Rate Reference Virtual TJ
5 CMOS/BICMOS
ASICs Analog and Mixed ≦ 50 V supply		 20 FIT 55°C

The Reference FIT Rate and Reference Virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.

2.2 QFN-24 Package

This section provides Functional Safety Failure In Time (FIT) rates for the QFN-24 package of TS3A27518E-Q1 based on two different industry-wide used reliability standards:

  • Table 2-3 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
  • Table 2-4 provides FIT rates based on the Siemens Norm SN 29500-2
Table 2-3 Component Failure Rates per IEC TR 62380 / ISO 26262 Part 11
FIT IEC TR 62380 / ISO 26262 FIT (Failures Per 109 Hours)
Total Component FIT Rate 13
Die FIT Rate 2
Package FIT Rate 11

The failure rate and mission profile information in Table 2-3 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:

  • Mission Profile: Motor Control from Table 11
  • Power dissipation: 50 mW
  • Climate type: World-wide Table 8
  • Package factor (lambda 3): Table 17b
  • Substrate Material: FR4
  • EOS FIT rate assumed: 0 FIT
Table 2-4 Component Failure Rates per Siemens Norm SN 29500-2
Table Category Reference FIT Rate Reference Virtual TJ
5 CMOS/BICMOS
ASICs Analog and Mixed ≦ 50 V supply		 20 FIT 55°C

The Reference FIT Rate and Reference Virtual TJ (junction temperature) in Table 2-4 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for TS3A27518E-Q1 Table 3-1 in comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure ModesFailure Mode Distribution (%)
MUX channel no output (HIZ)20%
MUX channel stuck NO15%
MUX channel stuck NC15%
MUX functional out of specification voltage or timing50%

The FMD in Table 3-1 excludes short circuit faults across the isolation barrier. Faults for short circuit across the isolation barrier can be excluded according to ISO 61800-5-2:2016 if the following requirements are fulfilled:

  1. The signal isolation component is OVC III according to IEC 61800-5-1. If a SELV/PELV power supply is used, pollution degree 2/OVC II applies. All requirements of IEC 61800-5-1:2007, 4.3.6 apply.
  2. Measures are taken to ensure that an internal failure of the signal isolation component cannot result in excessive temperature of its insulating material.

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance.

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TS3A27518E-Q1 (TSSOP-24 and QFN-24 package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2 and Table 4-6)
  • Pin open-circuited (see Table 4-3 and Table 4-7)
  • Pin short-circuited to an adjacent pin (see Table 4-4 and Table 4-8)
  • Pin short-circuited to supply (see Table 4-5 and Table 4-9)

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality
B No device damage, but loss of functionality
C No device damage, but performance degradation
D No device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • External pull-up resistor on CS to VDD
  • RC filter on every analog input, AINx.
    Series resistors are sized to limit the input currents into the analog inputs to <10 mA in all circumstances, for example also in case device is unpowered and input signal is applied.
  • Device is the only target on the SPI bus.

4.1 TSSOP-24 Package

Figure 4-1 shows the TS3A27518E-Q1 pin diagram for the TSSOP-24 package. For a detailed description of the device pins, refer to the Pin Configuration and Functions section in the TS3A27518E-Q1 data sheet.

Figure 4-1 Pin Diagram (TSSOP-24 Package)
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of potential failure effect(s) Failure effect class
NC2 1 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC1 2 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
N.C. 3 No effect, unconnected pin. D
COM1 4 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
GND 5 No effect; normal operation. D
COM2 6 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM3 7 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
VCC 8 Device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A
COM4 9 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM5 10 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO1 11 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM6 12 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO2 13 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN2 14 Address is stuck low. Cannot control the switch states. B
NO3 15 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO6 16 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO4 17 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO5 18 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC5 19 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
EN 20 EN is stuck low. Can no longer disable the device. B
NC4 21 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC6 22 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC3 23 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN1 24 Address is stuck low. Cannot control the switch states. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of potential failure effect(s) Failure effect class
NC2 1 Corruption of the signal passed onto the COM2 pin. B
NC1 2 Corruption of the signal passed onto the COM1 pin. B
N.C. 3 No effect; unconnected pin. B
COM1 4 Corruption of the signal passed onto the NO1/NC1 pins. B
GND 5 No effect; normal operation. B
COM2 6 Corruption of the signal passed onto the NO2/NC2 pins. B
COM3 7 Corruption of the signal passed onto the NO3/NC3 pins. B
VCC 8 Device is unpowered and not functional. B
COM4 9 Corruption of the signal passed onto the NO4/NC4 pins. B
COM5 10 Corruption of the signal passed onto the NO5/NC5 pins. B
NO1 11 Corruption of the signal passed onto the COM1 pin. B
COM6 12 Corruption of the signal passed onto the NO6/NC6 pins. B
NO2 13 Corruption of the signal passed onto the COM2 pin. B
IN2 14 Loss of control of the IN2 pin. Cannot control the switch. Unknown state can cause an increase in the IDD current B
NO3 15 Corruption of the signal passed onto the COM3 pin. B
NO6 16 Corruption of the signal passed onto the COM6 pin. B
NO4 17 Corruption of the signal passed onto the COM4 pin. B
NO5 18 Corruption of the signal passed onto the COM5 pin. B
NC5 19 Corruption of the signal passed onto the COM5 pin. B
EN 20 Loss of control of the EN pin. Cannot disable the switch. Unknown state can cause an increase in the IDD current B
NC4 21 Corruption of the signal passed onto the COM4 pin. B
NC6 22 Corruption of the signal passed onto the COM6 pin. B
NC3 23 Corruption of the signal passed onto the COM3 pin. B
IN1 24 Loss of control of the IN2 pin. Cannot control the switch. Unknown state can cause an increase in the IDD current. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
NC2 1 NC1 Possible corruption of the signal passed onto the COM pin. B
NC1 2 N.C. Unconnected pin, electrically floating; no effect. D
N.C. 3 COM1 Unconnected pin, electrically floating; no effect. D
COM1 4 GND Corruption of the signal passed onto the NO1/NC1 pins. If there is no limiting resistor in the switch path, then device damage is possible. A
GND 5 COM2 Device functions, but the analog signal is corrupted. If there is no limiting resistor in the switch path, then device damage is possible. A
COM2 6 COM3 Possible corruption of the signal passed onto the NO/NC pins. B
COM3 7 VCC Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
VCC 8 COM4 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM4 9 COM5 Possible corruption of the signal passed onto the NO/NC pins. B
COM5 10 NO1 Possible corruption of the signal passed onto the COM5 and NO1/NO5 pin. B
NO1 11 COM6 Possible corruption of the signal passed onto the NO1 and COM6/COM1 pin. B
COM6 12 NO2 Not considered; corner pin. D
NO2 13 IN2 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
IN2 14 NO3 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
NO3 15 NO6 Possible corruption of the signal passed onto the COM pin. B
NO6 16 NO4 Possible corruption of the signal passed onto the COM pin. B
NO4 17 NO5 Possible corruption of the signal passed onto the COM pin. B
NO5 18 NC5 Possible corruption of the signal passed onto the COM pin. B
NC5 19 EN Corruption of the signal passed onto the NC5 pin. Loss of control of the switch state. A
EN 20 NC4 Corruption of the signal passed onto the NC4 pin. Loss of control of the switch state. A
NC4 21 NC6 Possible corruption of the signal passed onto the COM pin. B
NC6 22 NC3 Possible corruption of the signal passed onto the COM pin. B
NC3 23 IN1 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
IN1 24 NC2 Not considered; corner pin. D
Table 4-5 Pin FMA for Device Pins Short-Circuited to VDD
Pin Name Pin No. Description of potential failure effect(s) Failure effect class
NC2 1 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC1 2 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
N.C. 3 No effect, unconnected pin. D
COM1 4 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
GND 5 Device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A
COM2 6 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM3 7 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
VCC 8 No effect; normal operation. D
COM4 9 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM5 10 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO1 11 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM6 12 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO2 13 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN2 14 Address stuck high. Cannot control the switch states. B
NO3 15 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO6 16 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO4 17 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO5 18 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC5 19 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
/EN 20 EN stuck high. Can no longer enable the device. B
NC4 21 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC6 22 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC3 23 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN1 24 Address stuck high. Cannot control the switch states. B

4.2 QFN-24 Package

Figure 4-2 shows the TS3A27518E-Q1 pin diagram for the QFN-24 package. For a detailed description of the device pins, refer to the Pin Configuration and Functions section in the TS3A27518E-Q1 data sheet.

Figure 4-2 Pin Diagram (QFN-24 Package)
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of potential failure effect(s) Failure effect class
COM1 1 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
GND 2 No effect; normal operation. D
COM2 3 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM3 4 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
VCC 5 Device is unpowered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A
COM4 6 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM5 7 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO1 8 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM6 9 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO2 10 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN2 11 Address stuck low. Cannot control the switch states. B
NO3 12 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO6 13 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO4 14 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO5 15 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC5 16 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
/EN 17 EN stuck low. Can no longer disable the device. B
NC4 18 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC6 19 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC3 20 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN1 21 Address stuck low. Cannot control the switch states. B
NC2 22 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC1 23 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
N.C. 24 No effect; unconnected pin. D
Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of potential failure effect(s) Failure effect class
COM1 1 Corruption of the signal passed onto the NO1/NC1 pins. B
GND 2 No effect; normal operation. B
COM2 3 Corruption of the signal passed onto the NO2/NC2 pins. B
COM3 4 Corruption of the signal passed onto the NO3/NC3 pins. B
VCC 5 Device is unpowered and not functional. B
COM4 6 Corruption of the signal passed onto the NO4/NC4 pins. B
COM5 7 Corruption of the signal passed onto the NO5/NC5 pins. B
NO1 8 Corruption of the signal passed onto the COM1 pin. B
COM6 9 Corruption of the signal passed onto the NO6/NC6 pins. B
NO2 10 Corruption of the signal passed onto the COM2 pin. B
IN2 11 Loss of control of the IN2 pin. Cannot control the switch. Unknown state can cause increase in the IDD current. B
NO3 12 Corruption of the signal passed onto the COM3 pin. B
NO6 13 Corruption of the signal passed onto the COM6 pin. B
NO4 14 Corruption of the signal passed onto the COM4 pin. B
NO5 15 Corruption of the signal passed onto the COM5 pin. B
NC5 16 Corruption of the signal passed onto the COM5 pin. B
/EN 17 Loss of control of the EN pin. Cannot disable the switch. Unknown state can cause increase in the IDD current. B
NC4 18 Corruption of the signal passed onto the COM4 pin. B
NC6 19 Corruption of the signal passed onto the COM6 pin. B
NC3 20 Corruption of the signal passed onto the COM3 pin. B
IN1 21 Loss of control of the IN2 pin. Cannot control the switch. Unknown state can cause an increase in the IDD current. B
NC2 22 Corruption of the signal passed onto the COM2 pin. B
NC1 23 Corruption of the signal passed onto the COM1 pin. B
N.C. 24 No effect; unconnected pin. B
Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of potential failure effect(s) Failure effect class
COM1 1 GND Corruption of the signal passed onto the NO1/NC1 pins. If there is no limiting resistor in the switch path, then device damage is possible. A
GND 2 COM2 Device functions, but the analog signal is corrupted. If there is no limiting resistor in the switch path, then device damage is possible. A
COM2 3 COM3 Possible corruption of the signal passed onto the NO/NC pins. B
COM3 4 VCC Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
VCC 5 COM4 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM4 6 COM5 Not considered; corner pin. D
COM5 7 NO1 Possible corruption of the signal passed onto the COM5 and NO1/NO5 pin. B
NO1 8 COM6 Possible corruption of the signal passed onto the NO1 and COM6/COM1 pin. B
COM6 9 NO2 Possible corruption of the signal passed onto the COM6 and NO2/NO6 pin. B
NO2 10 IN2 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
IN2 11 NO3 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
NO3 12 NO6 Not considered; corner pin. D
NO6 13 NO4 Possible corruption of the signal passed onto the COM pin. B
NO4 14 NO5 Possible corruption of the signal passed onto the COM pin. B
NO5 15 NC5 Possible corruption of the signal passed onto the COM pin. B
NC5 16 /EN Corruption of the signal passed onto the NC5 pin. Loss of control of the switch state. A
/EN 17 NC4 Corruption of the signal passed onto the NC4 pin. Loss of control of the switch state. A
NC4 18 NC6 Not considered; corner pin. D
NC6 19 NC3 Possible corruption of the signal passed onto the COM pin. B
NC3 20 IN1 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
IN1 21 NC2 Possible corruption of the signal passed onto the COMx pins. Loss of control of the switch state. B
NC2 22 NC1 Possible corruption of the signal passed onto the COM pin. B
NC1 23 N.C. Unconnected pin, electrically floating; no effect. D
N.C. 24 COM1 Not considered; corner pin. D
Table 4-9 Pin FMA for Device Pins Short-Circuited to VDD
Pin Name Pin No. Description of potential failure effect(s) Failure effect class
COM1 1 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
GND 2 Device is unpowered. Device is not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. A
COM2 3 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM3 4 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
VCC 5 No effect; normal operation. D
COM4 6 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM5 7 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO1 8 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
COM6 9 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO2 10 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN2 11 Address is stuck high. Cannot control the switch states. B
NO3 12 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO6 13 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO4 14 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NO5 15 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC5 16 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
/EN 17 EN stuck high. Can no longer enable the device. B
NC4 18 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC6 19 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC3 20 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
IN1 21 Address stuck high. Cannot control the switch states. B
NC2 22 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
NC1 23 Corruption of the analog signal. If there is no limiting resistor in the switch path, then device damage is possible. A
N.C. 24 No effect; unconnected pin. D

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.

TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 

Copyright © 2022, Texas Instruments Incorporated

 
Texas Instruments

© Copyright 1995-2025 Texas Instruments Incorporated. All rights reserved.
Submit documentation feedback | IMPORTANT NOTICE | Trademarks | Privacy policy | Cookie policy | Terms of use | Terms of sale