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LPV521 是一款单通道毫微功耗 552nW 放大器,专为超长使用寿命电池应用而设计。1.6V 至 5.5V 工作电压范围和 351nA 典型电源电流使得该器件非常适合 RFID 阅读器和远程传感器毫微功耗应用。该器件具有超出电源轨 0.1V 的输入共模电压、指定 TCVOS 和电压摆幅接近电源轨输出性能。LPV521 具有经过精心设计的 CMOS 输入级,具有 40fA IBIAS 电流(典型值),优于竞争产品。较低的输入电流能够显著降低在兆欧级电阻、高阻抗光电二极管和充电检测应用中引入的 IBIAS 和 IOS 误差。LPV521 是 PowerWise® 系列产品的一员,具有出色的功耗/性能比。
宽输入共模电压范围、指定的 1mV VOS 和 3.5µV/°C TCVOS 支持在高侧和低侧电流检测中实现精确、稳定的测量。
该器件集成了 EMI 保护,可降低对来自手机或其他 RFID 阅读器的意外 RF 信号的敏感度。
LPV521 采用 5 引脚 SC70 和 8 引脚 PDIP 封装。
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
DCK (SC70) | P (PDIP) | |||
IN+ | 3 | 3 | Input | Noninverting input |
IN– | 4 | 2 | Input | Inverting input |
OUT | 1 | 6 | Output | Output |
NC | — | 1, 4, 5 | — | Do not connect |
V+ | 5 | 8 | Power | Positive power supply |
V– | 2 | 7 | Power | Negative power supply |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Any pin relative to V– | –0.3 | 6 | V | ||
Input voltage, IN+, IN–, OUT pins | V– – 0.3 | V+ + 0.3 | V | ||
Input current, V+, V–, OUT pins | 40 | mA | |||
Differential input voltage (VIN+ – VIN–) | –300 | 300 | mV | ||
TJ | Junction temperature(2) | –40 | 150 | °C | |
Mounting temperature | Infrared or convection (30s) | 260 | °C | ||
Wave soldering lead temperature (4s) | 260 | °C | |||
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
DCK (SC70) PACKAGE | ||||
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged device model (CDM) per JEDEC specification JESD22-C101(2) | ±1000 | |||
Machine model | ±200 | |||
P (PDIP) PACKAGE | ||||
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged device model (CDM) per ANSI/ESDA/JEDEC JS-002(2) | ±1000 | |||
Machine model | ±200 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VS | Supply voltage, VS = (V+) – (V–) | 1.6 | 5.5 | V | |
TA | Temperature(2) | –40 | 125 | °C |
THERMAL METRIC(1) | LPV521 | UNIT | ||
---|---|---|---|---|
DCK (SC70) | P (PDIP) | |||
5 PINS | 8 PINS | |||
RθJA | Junction-to-ambient thermal resistance(2) | 456 | 102.3 | °C/W |
RθJC(top) | Junction-to-case(top) thermal resistance | 53.9 | 81.2 | °C/W |
RθJB | Junction-to-board thermal resistance | 48.9 | 64.9 | °C/W |
ψJT | Junction-to-top characterization parameter | 6.6 | 47.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 48.3 | 64.1 | °C/W |
RθJC(bot) | Junction-to-case(bottom) thermal resistance | N/A | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | VCM = V– + 0.3V | –1 | 0.1 | 1 | mV | |
TA = –40°C to +125°C | –1.23 | 1.23 | |||||
VCM = V+ – 0.3V | –1 | 0.1 | 1 | ||||
TA = –40°C to +125°C | –1.23 | 1.23 | |||||
TCVOS | Input offset voltage drift(2) | ±0.4 | µV/°C | ||||
TA = –40°C to +125°C | V+ = 1.8V, 3.3V | –3 | 3 | ||||
V+ = 5V | –3.5 | 3.5 | |||||
PSRR | Power-supply rejection ratio | 1.6V ≤ V+ ≤ 5.5V, VCM = 0.3V |
85 | 109 | dB | ||
TA = –40°C to +125°C | 76 | ||||||
INPUT BIAS CURRENT | |||||||
IBIAS | Input bias current | V+ = 1.8V, 3.3V | –1 | 0.01 | 1 | pA | |
V+ = 5V | –1 | 0.04 | 1 | ||||
TA = –40°C to +125°C | –50 | +50 | |||||
IOS | Input offset current | V+ = 1.8V | 10 | fA | |||
V+ = 3.3V | 20 | ||||||
V+ = 5V | 60 | ||||||
NOISE | |||||||
Input-referred voltage noise | V+ = 1.8V | 24 | µVPP | ||||
V+ = 3.3V, 5V | 22 | ||||||
en | Input-referred voltage noise density | f = 100Hz | V+ = 1.8V | 265 | nV/√Hz | ||
V+ = 3.3V | 259 | ||||||
V+ = 5V | 255 | ||||||
in | Input-referred current noise | f = 100Hz | 100 | fA/√Hz | |||
INPUT VOLTAGE | |||||||
CMRR | Common-mode rejection ratio | V– ≤ VCM ≤ V+ | V+ = 1.8V | 66 | 92 | dB | |
V+ = 1.8V, TA = –40°C to +125°C | 60 | ||||||
V+ = 3.3V | 72 | 97 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 70 | ||||||
V+ = 5V | 75 | 102 | |||||
V+ = 5V, TA = –40°C to +125°C | 74 | ||||||
V– ≤ VCM ≤ V+ – 1.1V | V+ = 1.8V | 75 | 101 | ||||
V+ = 1.8V, TA = –40°C to +125°C | 74 | ||||||
V+ = 3.3V | 78 | 106 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 75 | ||||||
V+ = 5V | 84 | 108 | |||||
V+ = 5V, TA = –40°C to +125°C | 80 | ||||||
V+ – 0.6V ≤ VCM ≤ V+ | V+ = 1.8V | 75 | 120 | ||||
V+ = 1.8V, TA = –40°C to +125°C | 53 | ||||||
V+ = 3.3V | 77 | 121 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 76 | ||||||
V+ = 5V | 77 | 115 | |||||
V+ = 5V, TA = –40°C to +125°C | 76 | ||||||
CMVR | Common-mode voltage range | V+ = 1.8V, CMRR ≥ 67dB, V+ = 3.3V, CMRR ≥ 72dB, V+ = 5V, CMRR ≥ 75dB |
(V–) – 0.1 | (V+) + 0.1 | V | ||
TA = –40°C to +125°C, V+ = 1.8V, CMRR ≥ 60dB, V+ = 3.3V, CMRR ≥ 70dB, V+ = 5V, CMRR ≥ 74dB |
(V–) | (V+) | V | ||||
OPEN-LOOP GAIN | |||||||
AVOL | Large-signal voltage gain | V– + 0.5V ≤ VO ≤ V+ – 0.5V, RL = 100kΩ to V+/2 |
V+ = 1.8V | 74 | 125 | dB | |
V+ = 1.8V, TA = –40°C to +125°C | 73 | ||||||
V+ = 3.3V | 82 | 120 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 76 | ||||||
V+ = 5V | 84 | 132 | |||||
V+ = 5V, TA = –40°C to +125°C | 76 | ||||||
FREQUENCY RESPONSE | |||||||
GBW | Gain bandwidth product | CL = 20pF, RL = 100kΩ | V+ = 1.8V | 6.1 | kHz | ||
V+ = 3.3V, 5V | 6.2 | ||||||
SR | Slew rate | Falling edge, AV = +1, VIN = V+ to V– |
V+ = 1.8V | 2.9 | V/ms | ||
V+ = 3.3V | 2.9 | ||||||
V+ = 5V | 1.1 | 2.7 | |||||
V+ = 5V, TA = –40°C to +125°C | 1.2 | ||||||
Rising edge, AV = +1, VIN = V– to V+ |
V+ = 1.8V | 2.3 | |||||
V+ = 3.3V | 2.5 | ||||||
V+ = 5V | 1.1 | 2.4 | |||||
V+ = 5V, TA = –40°C to +125°C | 1.2 | ||||||
θm | Phase margin | CL = 20pF, RL = 100kΩ | V+ = 1.8V | 72 | deg | ||
V+ = 3.3V, 5V | 73 | ||||||
Gm | Gain margin | CL = 20pF, RL = 100kΩ | V+ = 1.8V, 3.3V | 19 | dB | ||
V+ = 5V | 20 | ||||||
OUTPUT | |||||||
VO | Output voltage | Swing from positive rail, RL = 100kΩ to V+/2, VIN(diff) = 100mV |
V+ = 1.8V | 2 | 50 | mV | |
V+ = 1.8V, TA = –40°C to +125°C | 50 | ||||||
V+ = 3.3V | 3 | 50 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 50 | ||||||
V+ = 5V | 3 | 50 | |||||
V+ = 5V, TA = –40°C to +125°C | 50 | ||||||
Swing from negative rail, RL = 100kΩ to V+/2, VIN(diff) = –100mV |
V+ = 1.8V | 2 | 50 | ||||
V+ = 1.8V, TA = –40°C to +125°C | 50 | ||||||
V+ = 3.3V | 2 | 50 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 50 | ||||||
V+ = 5V | 3 | 50 | |||||
V+ = 5V, TA = –40°C to +125°C | 50 | ||||||
IO | Output current(3) | Sourcing, VO to V–, VIN(diff) = 100mV |
V+ = 1.8V | 1 | 3 | mA | |
V+ = 1.8V, TA = –40°C to +125°C | 0.5 | ||||||
V+ = 3.3V | 5 | 11 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 4 | ||||||
V+ = 5V | 15 | 23 | |||||
V+ = 5V, TA = –40°C to +125°C | 8 | ||||||
Sinking, VO to V+, VIN(diff) = –100mV |
V+ = 1.8V | 1 | 3 | ||||
V+ = 1.8V, TA = –40°C to +125°C | 0.5 | ||||||
V+ = 3.3V | 5 | 12 | |||||
V+ = 3.3V, TA = –40°C to +125°C | 4 | ||||||
V+ = 5V | 15 | 22 | |||||
V+ = 5V, TA = –40°C to +125°C | 8 | ||||||
POWER SUPPLY | |||||||
IS | Supply current | VCM = V– + 0.3 V | V+ = 1.8V | 345 | 400 | nA | |
V+ = 1.8V, TA = –40°C to +125°C | 580 | nA | |||||
V+ = 3.3V | 346 | 400 | nA | ||||
V+ = 3.3V, TA = –40°C to +125°C | 600 | nA | |||||
V+ = 5V | 351 | 400 | nA | ||||
V+ = 5V, TA = –40°C to +125°C | 620 | nA | |||||
VCM = V+ – 0.3 V | V+ = 1.8V | 472 | 600 | nA | |||
V+ = 1.8V, TA = –40°C to +125°C | 850 | nA | |||||
V+ = 3.3V | 471 | 600 | nA | ||||
V+ = 3.3V, TA = –40°C to +125°C | 860 | nA | |||||
V+ = 5V | 475 | 600 | nA | ||||
V+ = 5V, TA = –40°C to +125°C | 870 | nA | |||||
NOISE IMMUNITY | |||||||
EMIRR | EMI rejection ratio, IN+ and IN– (4) |
V+ = 5V, VRF_PEAK = 100mVP (–20dBP) |
f = 400MHz | 121 | dB | ||
f = 900MHz | 121 | ||||||
f = 1800MHz | 124 | ||||||
f = 2400MHz | 142 |
at TJ = 25°C (unless otherwise specified)
The LPV521 is fabricated with Texas Instruments' state-of-the-art VIP50 process. This proprietary process dramatically improves the performance of Texas Instruments' low-power and low-voltage operational amplifiers. The following sections showcase the advantages of the VIP50 process and highlight circuits that enable ultra-low power consumption.
The amplifier differential inputs consist of a noninverting input (+IN) and an inverting input (–IN). The amplifier amplifies only the difference in voltage between the two inputs, which is called the differential input voltage. The output voltage of the op-amp VOUT is given by Equation 1:
where AOL is the open-loop gain of the amplifier, typically around 132dB (4,000,000 ×, or 0.25µV/V).
The LPV521 has a rail-to-rail input that provides more flexibility for the system designer. Rail-to-rail input is achieved by using in parallel, one PMOS differential pair and one NMOS differential pair. When the common mode input voltage (VCM) is near V+, the NMOS pair is on and the PMOS pair is off. When VCM is near V−, the NMOS pair is off and the PMOS pair is on. When VCM is between V+ and V−, internal logic decides how much current each differential pair get. This special logic maintains stable and low-distortion amplifier operation within the entire common-mode voltage range.
Both input stages have an offset voltage (VOS) characteristic; therefore, the offset voltage of the LPV521 becomes a function of VCM. VOS has a crossover point at 1.0V less than V+. See the Input Offset Voltage vs Input Common Mode curves in the Typical Characteristics. Take care in situations where the input signal amplitude is comparable to the VOS value or the design requires high accuracy. In these situations, the input signal must avoid the crossover point. In addition, parameters such as PSRR and CMRR that involve the input offset voltage are also affected by changes in VCM across the differential-pair transition region.