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UCC21732-Q1 是一款电隔离单通道栅极驱动器,旨在用于 SiC MOSFET 和 IGBT,工作电压高达 2121V(直流),具有先进的保护特性、出色的动态性能和稳健性。UCC21732-Q1 具有高达 ±10A 的峰值拉电流和灌电流。
输入侧通过 SiO2 电容隔离技术与输出侧相隔离,支持高达 1.5kVRMS 的工作电压、12.8kVPK 的浪涌抗扰度,隔离栅寿命超过 40 年,并提供较低的器件间偏斜,共模噪声抗扰度 (CMTI) 大于 150V/ns。
UCC21732-Q1 包括先进的保护特性,如快速过流和短路检测、分流电流检测支持、故障报告、有源米勒钳位、输入和输出侧电源 UVLO(用于优化 SiC 和 IGBT 开关行为)和稳健性。可以利用隔离式模拟至 PWM 传感器更轻松地进行温度或电压感测,从而进一步提高驱动器的多功能性并简化系统设计工作量、尺寸和成本。
器件型号 | 封装(1) | 封装尺寸(标称值) |
---|---|---|
UCC21732-Q1 | DW(SOIC,16) | 10.3mm × 7.5mm |
PIN | I/O(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AIN | 1 | I | Isolated analog sensing input, parallel a small capacitor to COM for better noise immunity. Tie to COM if unused. |
OC | 2 | I | Over current detection pin, support lower threshold for SenseFET, DESAT, and Shunt resistor sensing. Tie to COM if unused. |
COM | 3 | P | Common ground reference, connecting to emitter pin for IGBT and source pin for SiC-MOSFET |
OUTH | 4 | O | Gate driver output pull up |
VDD | 5 | P | Positive supply rail for gate drive voltage, Bypassing a >10-μF capacitor to COM to support specified gate driver source peak current capability. Place decoupling capacitor close to the pin. |
OUTL | 6 | O | Gate driver output pull down |
CLMPE | 7 | O | External Active miller clamp, connecting this pin to the gate of the external miller clamp MOSFET. Leave floating if unused. |
VEE | 8 | P | Negative supply rail for gate drive voltage. Bypassing a >10-μF capacitor to COM to support specified gate driver sink peak current capability. Place decoupling capacitor close to the pin. |
GND | 9 | P | Input power supply and logic ground reference |
IN+ | 10 | I | Non-inverting gate driver control input. Tie to VCC if unused. |
IN– | 11 | I | Inverting gate driver control input. Tie to GND if unused. |
RDY | 12 | O | Power good for VCC-GND and VDD-COM. RDY is open drain configuration and can be paralleled with other RDY signals |
FLT | 13 | O | Active low fault alarm output upon overcurrent or short circuit. FLT is in open drain configuration and can be paralleled with other faults |
RST/EN | 14 | I | The
RST/EN serves two purposes: 1) Enable / shutdown of the output side. The FET is turned off by a regular turn-off, if terminal EN is set to low; 2) Resets the OC condition signaled on FLT pin. if terminal RST/EN is set to low for more than 1000 ns. A reset of signal FLT is asserted at the rising edge of terminal RST/EN. For automatic RESET function, this pin only serves as an EN pin. Enable / shutdown of the output side. The FET is turned off by a general turn-off, if terminal EN is set to low. |
VCC | 15 | P | Input power supply from 3 V to 5.5 V, bypassing a >1-μF capacitor to GND. Place decoupling capacitor close to the pin. |
APWM | 16 | O | Isolated Analog Sensing PWM output. Leave floating if unused. |