ZHCSPP6E May   2008  – July 2024 LMH6518

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Preamplifier
        1. 6.3.1.1 Primary Output Amplifier
        2. 6.3.1.2 Auxiliary Amplifier
      2. 6.3.2 Overvoltage Clamp
      3. 6.3.3 Attenuator
      4. 6.3.4 Digital Control Block
    4. 6.4 Device Functional Modes
      1. 6.4.1 Primary Amplifier
      2. 6.4.2 Auxiliary Output
    5. 6.5 Programming
      1. 6.5.1 Logic Functions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Oscilloscope Front End
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Settings and ADC SPI Code (ECM)
          2. 7.2.1.2.2 Input and Output Considerations
            1. 7.2.1.2.2.1 Output Swing, Clamping, and Operation Beyond Full Scale
          3. 7.2.1.2.3 Oscilloscope Trigger Applications
        3. 7.2.1.3 Application Curves
      2. 7.2.2 JFET LNA Implementation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Attenuator Design
        3. 7.2.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 第三方产品免责声明
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

8.1.2 Device Nomenclature

Table 8-1 Definition of Terms and Specifications
TERM DEFINITION
AV_CM (dB) Change in output offset voltage (ΔVOOS) with respect to the change in input common-mode voltage (ΔVI_CM)
AV_DIFF (dB) Gain with 100-Ω differential load
CM Common mode
CMRR (dB) Common-mode rejection defined as: AV_DIFF (dB) – AV_CM (dB)
CMRR_CM Common-mode rejection relative to VCM defined as: ΔVOOS /ΔVCM
HG Preamp high gain
Ladder Ladder attenuator setting (0 dB to 20 dB)
LG Preamp low gain
Max Gain Gain = 38.8 dB
Min Gain Gain = −1.16 dB
+OUT Positive main output
−OUT Negative main output
+OUT AUX Positive auxiliary output
−OUT AUX Negative auxiliary output
PB Phase balance defined as the phase difference between the complimentary outputs relative to 180°
PSRR Input-referred VOOS shift divided by change in VCC
PSRR_CM Output common-mode voltage change (ΔVO_CM) with respect to VCC voltage change (ΔVCC)
VCM Input pin voltage that sets main output CM
VCM_Aux Input pin voltage that sets auxiliary output CM
VI_CM Input CM voltage (average of +IN and −IN)
ΔVIN (V) Differential voltage across device inputs
VOOS DC offset voltage. Differential output voltage measured with inputs shorted together to VCC / 2
VO_CM Output common-mode voltage (dc average of V+OUT and V−OUT)
VOS_CM CM offset voltage: VO_CM – VCM
ΔVO_CM Variation in output common-mode voltage (VO_CM)
∆ V O _ C M ∆ V O U T Balance error. Measure of the output swing balance of +OUT and −OUT, as reflected on the output common-mode voltage (VO_CM), relative to the differential output swing (VOUT). Calculated as output common-mode voltage change (ΔVO_CM) divided by the output differential voltage change (ΔVOUT, which is nominally around 700 mVPP)
ΔVOUT Change in differential output voltage (corrected for dc offset, VOOS)