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  • TPS92519-Q1 4.5V 至 65V、双路、汽车类 2A 同步降压 LED 驱动器

    • ZHCSMX7A August   2021  – December 2021 TPS92519-Q1

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  • TPS92519-Q1 4.5V 至 65V、双路、汽车类 2A 同步降压 LED 驱动器
  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Buck Converter Switching Operation
      2. 7.3.2  Switching Frequency and Adaptive On-Time Control
      3. 7.3.3  Minimum On-Time, Off-Time, and Inductor Ripple
      4. 7.3.4  Enable
      5. 7.3.5  LED Current Regulation and Error Amplifier
      6. 7.3.6  Start-up Sequence
      7. 7.3.7  Analog Dimming and Forced Continuous Conduction Mode
      8. 7.3.8  External PWM Dimming and Input Undervoltage Lockout (UVLO)
      9. 7.3.9  Shunt FET Dimming or Matrix Beam Application
      10. 7.3.10 Bias Supply
      11. 7.3.11 Bootstrap Supply
      12. 7.3.12 Faults and Diagnostics
      13. 7.3.13 Output Short Circuit Fault
      14. 7.3.14 Output Open Circuit Fault
      15. 7.3.15 Parallel Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power On Reset (POR)
      2. 7.4.2 Run Mode
      3. 7.4.3 Sleep Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Duty Cycle Consideration
      2. 8.1.2  Switching Frequency Selection
      3. 8.1.3  LED Current Set Point
      4. 8.1.4  Inductor Selection
      5. 8.1.5  Output Capacitor Selection
      6. 8.1.6  Input Capacitor Selection
      7. 8.1.7  Bootstrap Capacitor Selection
      8. 8.1.8  Compensation Capacitor Selection
      9. 8.1.9  Input Undervoltage Protection
      10. 8.1.10 CSN Protection Diode
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Calculating Duty Cycle
        2. 8.2.2.2 Calculating Minimum On-Time and Off-Time
        3. 8.2.2.3 Minimum Switching Frequency
        4. 8.2.2.4 LED Current Set Point
        5. 8.2.2.5 Inductor Selection
        6. 8.2.2.6 Output Capacitor Selection
        7. 8.2.2.7 Bootstrap Capacitor Selection
        8. 8.2.2.8 Compensation Capacitor Selection
        9. 8.2.2.9 PWM Dimming and Input Voltage Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact Layout for EMI Reduction
        1. 10.1.1.1 Ground Plane
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 术语表
  12. 12Mechanical, Packaging, and Orderable Information
  13. 重要声明
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DATA SHEET

TPS92519-Q1 4.5V 至 65V、双路、汽车类 2A 同步降压 LED 驱动器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 符合面向汽车应用的 AEC-Q100 标准
    • 1 级：–40°C 至 125°C 的工作环境温度范围
    • 器件 HBM 分类等级 H1C
    • 器件 CDM 分类等级 C2
  • 提供功能安全
    • 可帮助进行功能安全系统设计的文档
  • 4.5V 至 65V 的宽输入电压范围
  • 输出电流高达 2A，精度为 4%
  • 自适应导通时间平均电流控制
  • 标称开关频率
    • 通道 1 和通道 2 为 385kHz 和 435kHz
    • 通道 1 和通道 2 为 2MHz 和 2.1MHz
  • 高级调光操作
    • 精确模拟调光
    • 支持外部 PWM 调光输入
    • 针对外部分流调光（包括 LED 矩阵管理器）进行优化
  • 开关逐周期过流保护
  • 开关过热保护
  • LED 开路和短路故障监控和报告

2 应用

  • 汽车前照灯和自适应 LED 驱动模块

3 说明

TPS92519-Q1 是一款单片双路同步降压 LED 驱动器，具有 4.5V 至 65V 宽工作输入电压范围，可独立为两串串联的 LED 供电。
TPS92519-Q1 实施自适应导通时间平均电流模式控制功能，经设计可与分流 FET 调光技术和基于 LED 矩阵管理器的动态光束前照灯兼容。自适应导通时间控制功能可提供近乎恒定的开关频率，可使用 FSET 输入来设置该开关频率。电感器电流感应和闭环反馈功能可在较宽的输入电压、输出电压和环境温度范围内实现 ±4% 以上的精度。

高性能 LED 驱动器可使用模拟调光或 PWM 调光技术来单独调制 LED 电流。通过在高阻抗模拟调整 (IADJ) 输入范围内将电压从 140mV 改变为 2.45V，可获得超过 16:1 范围的线性模拟调光响应。通过使用所需占空比和频率直接调制对应的 UDIM 输入引脚，实现 LED 电流的 PWM 调光。该器件支持高频分流 FET 调光，并与使用 LED 矩阵管理器的像素控制技术兼容。

TPS92519-Q1 支持两个或更多通道的并行运行，从而实现驱动大电流 LED 或激光二极管所需的灵活性。电流基于 IADJ 输入在并行通道之间共享，不受元件容差和寄生效应的影响。

TPS92519-Q1 包含高级故障保护功能：逐周期开关电流限制、自举欠压和热关断。该器件包括一个开漏故障输出以指示输出开路和短路情况。

TPS92519-Q1 采用 8.1mm × 11mm 热增强型 32 引脚 HTSSOP 封装，具有 2.75mm × 3.45mm 的底部外露焊盘。

器件信息
器件型号(1)封装封装尺寸（标称值）
TPS92519-Q1HTSSOP8.1mm × 11mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
GUID-20210816-SS0I-BDJ6-FFRW-C3GK2SPMG64S-low.gif简化版原理图

4 Revision History

Changes from Revision * (August 2021) to Revision A (December 2021)

  • 将状态从“预告信息”更改为“量产数据”Go

5 Pin Configuration and Functions

Figure 5-1 DAP Package 32-Pin HTSSOP Top View
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
DAP
BST1 19 P Supply input for high-side MOSFET gate drive circuit. Connect a ceramic capacitor between BSTx and SWx pins. An internal diode is connected between V5D and BSTx.
BST2 30 P
COMP1 16 I/O Output of internal transconductance error amplifier. Connect an integral compensation network to ensure stability.
COMP2 1 I/O
CSN1 17 I Negative input (–) of internal rail-to-rail transconductance error amplifier. Connect directly to the negative node of the LED current sense resistor, RCS.
CSN2 32 I
CSP1 18 I Positive input (+) of internal rail-to-rail transconductance error amplifier. Connect directly to the positive node of the LED current sense resistor, RCS.
CSP2 31 I
EN 24 I An active high logic input enables the devices. Pull this pin low to enter low power sleep state.
FLT1 22 O Open-drain fault indicator. Connect to V5D with a resistor to create an active low fault signal output.
FLT2 27 O
FSET 25 I Frequency select input. Connect to V5D to operate at nominal frequency of 440 kHz. Connect to GND to operate at nominal frequency of 2.1 MHz.
GND 7, 10 G Signal ground. Return for the internal voltage reference and analog circuits. Connect to circuit ground to complete return path.
IADJ1 23 I Analog adjust input. Input below 100 mV disables the channel. The analog input can be varied between 140 mV to 2.4 V to set current reference from 10 mV to 173 mV. Connect a 0.1-μF capacitor from pin to GND.
IADJ2 26 I
PGND 3, 4, 13, 14 G Ground returns for low-side MOSFETs
SW1 20, 21 P Switching output of the regulator. Internally connected to both power MOSFETs. Connect to the power inductor.
SW2 28, 29 P
UDIM1 15 I Undervoltage lockout and external PWM dimming input. Connect to VIN through a resistor divider to implement input undervoltage protection. Diode couple external PWM signal to enable dimming. Locally decouple to GND using a 1-nF ceramic capacitor. Do not float.
UDIM2 2 I
V5A 8 P Analog supply voltage. Locally decouple to GND using a 100-nF to 1-µF ceramic capacitor located close to the controller.
V5D 9 P Digital supply voltage. Locally decouple to GND using a 2.2-µF to 4.7-µF ceramic capacitor located close to the controller.
VIN1 11, 12 P Power inputs and connections to high-side MOSFET drain node. Connect to the power supply and bypass capacitors CIN. The path from the VIN pin to high frequency bypass CIN and PGND must be as short as possible.
VIN2 5, 6 P

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply Voltage V5A, V5D to GND –0.3 5.5 V
Boot voltage BSTx to SWx –0.3 5.5 V
BSTx to PGND –0.3 70 V
Switch node voltage SWx to PGND –0.5 65 V
SWx to PGND (< 10ns) –3.5 V
Drain node voltage VINx to PGND –0.3 65 V
Current CSNx to VINx (< 10µs) 1.5 A
GND to CSPx, GND to CSNx (< 10µs) 430 mA
Inputs CSNx - VINx 0.5 V
CSPx, CSNx to GND –0.5 65 V
CSPx to CSNx –0.3 0.3 V
UDIMx to GND –0.3 65 V
COMPx, IADJx, FSET, EN to GND –0.3 5.5 V
Outputs  FLTx to GND –0.3 5.5 V
Junction temperature TJ 150 °C
Lead temperature Soldering, 10 s 260 °C
Storage temperature Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) ±2000 V
Charged device model (CDM), per AEC Q100-011 Corner pins (1, 16, 17, and 32) ±750
Other pins ±500
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage 4.5 63 V
V5A, V5D Bias supply 4.5 5 5.3 V
dV5x/dt Bias supply slew-rate 20 V/s
∆V(CSP-CSN) Sensed inductor current ripple 20 mV
dvCSP/dt CSP slew-rate 10 V/µs
ILED LED current 2 A
fUDIM External PWM dimming frequency 1000 Hz
TA Ambient temperature –40 125 °C
TJ Junction temperature –40 150 °C

 
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