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  • TMUX720x 具有1.8V 逻辑电平和闩锁效应抑制特性的 44V、8:1 单通道和 4:1 双通道精密多路复用器

    • ZHCSLO9F July   2020  – July 2024 TMUX7208 , TMUX7209

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  • TMUX720x 具有1.8V 逻辑电平和闩锁效应抑制特性的 44V、8:1 单通道和 4:1 双通道精密多路复用器
  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Source or Drain Continuous Current
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 6.7  ±15 V Dual Supply: Switching Characteristics 
    8. 6.8  ±20 V Dual Supply: Electrical Characteristics
    9. 6.9  ±20 V Dual Supply: Switching Characteristics
    10. 6.10 44 V Single Supply: Electrical Characteristics 
    11. 6.11 44 V Single Supply: Switching Characteristics 
    12. 6.12 12 V Single Supply: Electrical Characteristics 
    13. 6.13 12 V Single Supply: Switching Characteristics 
    14. 6.14 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  tON(EN) and tOFF(EN)
    6. 7.6  Break-Before-Make
    7. 7.7  tON (VDD) Time
    8. 7.8  Propagation Delay
    9. 7.9  Charge Injection
    10. 7.10 Off Isolation
    11. 7.11 Crosstalk
    12. 7.12 Bandwidth
    13. 7.13 THD + Noise
    14. 7.14 Power Supply Rejection Ratio (PSRR)
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 8.3.5 Fail-Safe Logic
      6. 8.3.6 Latch-Up Immune
      7. 8.3.7 Ultra-Low Charge Injection
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
  14. 重要声明
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Data Sheet

TMUX720x 具有1.8V 逻辑电平和闩锁效应抑制特性的 44V、8:1 单通道和 4:1 双通道精密多路复用器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

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1 特性

  • 闩锁效应抑制
  • 双电源电压范围：±4.5V 至 ±22V
  • 单电源电压范围：4.5V 至 44V
  • 低导通电阻：4Ω
  • 低电荷注入：3pC
  • 大电流支持：400mA（最大值）(WQFN)
  • 大电流支持：300mA（最大值）(TSSOP)
  • –40°C 至 +125°C 工作温度
  • 1.8V 逻辑兼容输入
  • 逻辑引脚上的集成下拉电阻
  • 失效防护逻辑
  • 轨到轨运行
  • 双向信号路径
  • 先断后合开关

2 应用

  • 工厂自动化和控制
  • 可编程逻辑控制器 (PLC)
  • 模拟输入模块
  • 半导体测试设备
  • 电池测试设备
  • 超声波扫描仪
  • 患者监护和诊断
  • 光纤网络
  • 光学测试设备
  • 有线网络
  • 数据采集系统 (DAQ)

3 说明

TMUX7208 是一款 8:1 单通道精密多路复用器；TMUX7209 是一款 4:1 双通道多路复用器，具有低导通电阻和电荷注入。此器件在单电源（4.5V 至 44V）、双电源（±4.5V 至 ±22V）或非对称电源（例如 VDD = 12V，VSS = –5V）供电时均能正常运行。TMUX720x 可支持源极 (Sx) 和漏极 (D) 引脚上 VSS 到 VDD 范围的双向模拟和数字信号。

TMUX720x 是精密开关和多路复用器系列器件，具有非常低的导通和关断漏电流，因此可用于高精度测量应用。TMUX720x 系列具有闩锁效应抑制，可防止器件内寄生结构之间通常由过压事件引起的大电流不良事件。闩锁状态通常会一直持续到电源轨关闭为止，并可能导致器件失效。闩锁效应抑制使得 TMUX720x 系列开关和多路复用器能够在恶劣的环境中使用。

表 3-1 器件信息
器件型号(1) 配置 封装(2)
TMUX7208 1 通道

8:1 多路复用器

 PW（TSSOP，16）
TMUX7209 2 通道

4:1 多路复用器

 RUM（WQFN，16）
(1) 请参阅器件比较。
(2) 有关更多信息，请参阅节 12。
TMUX7208 TMUX7209 TMUX7208 和 TMUX7209 方框图TMUX7208 和 TMUX7209 方框图

4 Device Comparison Table

PRODUCT DESCRIPTION
TMUX7208 Low-Leakage-Current, Precision, 8:1, 1-Ch. multiplexer
TMUX7209 Low-Leakage-Current, Precision, 4:1, 2-Ch. multiplexer

5 Pin Configuration and Functions

TMUX7208 TMUX7209 TMUX7208: PW Package16-Pin TSSOPTop ViewFigure 5-1 TMUX7208: PW Package16-Pin TSSOPTop View
TMUX7208 TMUX7209 TMUX7208: RUM Package16-Pin WQFNTop ViewFigure 5-2 TMUX7208: RUM Package16-Pin WQFNTop View
Table 5-1 TMUX7208 Pin Functions
PIN TYPE(1) DESCRIPTION(2)
NAME PW RUM
A0 1 15 I Logic control input, has internal 4MΩ pull-down resistor. Controls the switch configuration as shown in Section 8.5.
A1 16 14 I Logic control input, has internal 4MΩ pull-down resistor. Controls the switch configuration as shown in Section 8.5.
A2 15 13 I Logic control input, has internal 4MΩ pull-down resistor. Controls the switch configuration as shown in Section 8.5.
D 8 6 I/O Drain pin. Can be an input or output.
EN 2 16 I Active high logic enable, has internal 4MΩ pull-down resistor. When this pin is low, all switches are turned off. When this pin is high, the Ax logic input determines which switch is turned on.
GND 14 12 P Ground (0V) reference.
S1 4 2 I/O Source pin 1. Can be an input or output.
S2 5 3 I/O Source pin 2. Can be an input or output.
S3 6 4 I/O Source pin 3. Can be an input or output.
S4 7 5 I/O Source pin 4. Can be an input or output.
S5 12 10 I/O Source pin 5. Can be an input or output.
S6 11 9 I/O Source pin 6. Can be an input or output.
S7 10 8 I/O Source pin 7. Can be an input or output.
S8 9 7 I/O Source pin 8. Can be an input or output.
VDD 13 11 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1μF to 10μF between VDD and GND.
VSS 3 1 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1μF to 10μF between VSS and GND.
Thermal Pad — The thermal pad is not connected internally. It is recommended that the pad be tied to GND or VSS for best performance.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 8.4 for what to do with unused pins.
TMUX7208 TMUX7209 TMUX7209: PW Package16-Pin TSSOPTop ViewFigure 5-3 TMUX7209: PW Package16-Pin TSSOPTop View
TMUX7208 TMUX7209 TMUX7209: RUM Package16-Pin WQFNTop ViewFigure 5-4 TMUX7209: RUM Package16-Pin WQFNTop View
Table 5-2 TMUX7209 Pin Functions
PIN TYPE(1) DESCRIPTION(2)
NAME PW RUM
A0 1 15 I Logic control input, has internal pull-down resistor. Controls the switch configuration as shown in Section 8.5.
A1 16 14 I Logic control input, has internal pull-down resistor. Controls the switch configuration as shown in Section 8.5.
DA 8 6 I/O Drain Terminal A. Can be an input or an output.
DB 9 7 I/O Drain Terminal B. Can be an input or an output.
EN 2 16 I Active high logic enable, has internal pull-up resistor. When this pin is low, all switches are turned off. When this pin is high, the Ax logic input determines which switch is turned on.
GND 15 13 P Ground (0V) reference.
S1A 4 2 I/O Source pin 1A. Can be an input or output.
S1B 13 11 I/O Source pin 1B. Can be an input or output.
S2A 5 3 I/O Source pin 2A. Can be an input or output.
S2B 12 10 I/O Source pin 2B. Can be an input or output.
S3A 6 4 I/O Source pin 3A. Can be an input or output.
S3B 11 9 I/O Source pin 3B. Can be an input or output.
S4A 7 5 I/O Source pin 4A. Can be an input or output.
S4B 10 8 I/O Source pin 4B. Can be an input or output.
VDD 14 12 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1μF to 10μF between VDD and GND.
VSS 3 1 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1μF to 10μF between VSS and GND.
Thermal Pad — The thermal pad is not connected internally. It is recommended that the pad be tied to GND or VSS for best performance.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 8.4 for what to do with unused pins.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VDD – VSS Supply voltage 48 V
VDD –0.5 48 V
VSS –48 0.5 V
VADDRESS or VEN Logic control input pin voltage (EN, A0, A1, A2)  –0.5 48 V
IADDRESS or IEN Logic control input pin current (EN, A0, A1, A2) –30 30 mA
VS or VD Source or drain voltage (Sx, D) VSS–0.5 VDD+0.5 V
IIK  Diode clamp current(3) –30 30 mA
IS or ID (CONT) Source or drain continuous current (Sx, D) IDC + 10 %(4) mA
TA Ambient temperature –55 150 °C
Tstg Storage temperature –65 150 °C
TJ Junction temperature 150 °C
Ptot Total power dissipation (QFN package)(5)  1650 mW
Total power dissipation (TSSOP package)(5)  700 mW
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) Pins are diode-clamped to the power-supply rails. Over voltage signals must be voltage and current limited to maximum ratings.
(4) Refer to Source or Drain Continuous Current table for IDC specifications.
(5) For QFN package: Ptot derates linearily above TA = 70°C by 24.4mW/°C.
For TSSOP package: Ptot derates linearily above TA = 70°C by 10.8mW/°C.

 
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