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  • 采用小型封装且具有低残余电压和集成浪涌保护功能的 TIOL112 和 TIOL112x IO-Link 器件收发器

    • ZHCSLJ5D February   2022  – March 2023 TIOL112 , TIOL1123 , TIOL1125

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  • 采用小型封装且具有低残余电压和集成浪涌保护功能的 TIOL112 和 TIOL112x IO-Link 器件收发器
  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC Specifications
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Wake-Up Detection
      2. 8.3.2  Current Limit Configuration
      3. 8.3.3  Current Fault Detection, Indication and Auto Recovery
      4. 8.3.4  Thermal Warning, Thermal Shutdown
      5. 8.3.5  Fault Reporting (NFAULT)
      6. 8.3.6  Transceiver Function Tables
      7. 8.3.7  The Integrated Voltage Regulator (LDO)
      8. 8.3.8  Reverse Polarity Protection
      9. 8.3.9  Integrated Surge Protection and Transient Waveform Tolerance
      10. 8.3.10 Power Up Sequence (TIOL112)
      11. 8.3.11 Undervoltage Lock-Out (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 NPN Configuration (N-Switch SIO Mode)
      2. 8.4.2 PNP Configuration (P-Switch SIO Mode)
      3. 8.4.3 Push-Pull, Communication Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Maximum Junction Temperature Check
        2. 9.2.2.2 Driving Capacitive Loads
        3. 9.2.2.3 Driving Inductive Loads
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  11. 11Mechanical, Packaging, and Orderable Information
  12. 重要声明
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DATA SHEET

采用小型封装且具有低残余电压和集成浪涌保护功能的 TIOL112 和 TIOL112x IO-Link 器件收发器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 7V 至 36V 电源电压
  • PNP、NPN 或 IO-Link 可配置输出
    • IEC 61131-9 COM1、COM2 和 COM3 数据速率支持
  • 功能安全型
    • 可提供用于功能安全系统设计的文档
  • 与 TIOL111(x) 引脚兼容，并提升了性能
    • 在 200mA 条件下，残余电压低，为 0.5V
      （典型值）
    • 有效驱动器电流限制能力
    • 改善了封装的热性能
    • 更低的驱动器压摆率，以减少过冲：
      最大 750ns

  • 使系统更加稳健的集成保护特性

    • 可配置驱动器过流限制：
      50mA 至 350mA
    • L+、CQ 和 L- 上高达 65V 的有效反极性保护
    • 过流、过热和 UVLO 的故障指示灯
    • 电感性负载的安全快速消磁功能
    • 工作环境温度
      ：-40°C 至 125°C
  • L+ 和 CQ 上的集成式 EMC 保护
    • ±8 kV IEC 61000-4-2 ESD 接触放电
    • ±4kV IEC 61000-4-4 电气快速瞬变
    • ±1.2kV/500Ω IEC 61000-4-5 浪涌
  • 较大电容性负载驱动能力
  • < 2µA CQ 泄露电流
  • < 1.5mA 静态电源电流
  • 集成式 LDO 选项可支持高达 20mA 的电流
    • TIOL1123：3.3V LDO
    • TIOL1125：5V LDO

    • TIOL1123L (YAH)：可选 3.3V/5V 输出

  • 远程唤醒指示和唤醒生成
  • 节省空间的小型封装选项
    • 3mm x 3mm 10 引脚 VSON 封装：
      与 TIOL111 引脚兼容
    • 2.45 mm x 1.7 mm DSBGA 封装

2 应用

  • 现场发送器和执行器
  • 工厂自动化
  • 过程自动化
  • 远程 IO 中的 IO-Link PHY

3 说明

TIOL112(x) 系列收发器使用 IO-Link 接口实现工业双向点到点通信。当此器件通过一个三线制接口连接至一个 IO-Link 主器件时，主器件能够发起通信并与远程节点交换数据，而此时 TIOL112(x) 则用作一个用于通信的完整物理层。

这些器件能够承受高达 1.2kV (500Ω) 的 IEC 61000-4-5 浪涌，并集成反向极性保护功能。只需通过一个简单的引脚可编程接口，便可轻松连接到控制器电路。可使用外部电阻器配置输出电流限值。TIOL112(x) 可配置为生成唤醒脉冲并用于 IO-link 主应用。针对欠压、过流和过热情况提供了故障报告和内部保护功能。

器件信息
器件型号封装(1)封装尺寸（标称值）
TIOL112VSON (10)3.00mm x 3.00mm
TIOL1123
TIOL1125
TIOL112DSBGA (12)2.45mm x 1.70mm
TIOL1123
(1) 如需了解所有可订购器件，请参阅数据表末尾的可订购产品附录。
GUID-20201112-CA0I-LDR2-KFNF-XTK5HQFHJ6SM-low.svg典型应用图

4 Revision History

Changes from Revision C (January 2023) to Revision D (March 2023)

  • Added the package outline and land pattern images for the YAH (DSBGA) 12-pin packageGo

Changes from Revision B (December 2022) to Revision C (January 2023)

  • 删除了器件信息 表中 DSBGA 封装的预告信息 注释Go

Changes from Revision A (April 2022) to Revision B (December 2022)

  • Removed the conditional note 2 from the IEC Ratings - ESD Specifications table that specified 4.5kV when EN=TX=HIGH Go
  • Changed the description of I(VCC_OUT) from: (TIOL112L only) to: TIOL1123(L), TIOL1125 only in the Recommended Operating Conditions tableGo
  • Changed Figure 6-4 and Figure 6-6 Go
  • Added application curves Figure 9-6 and Figure 9-7 showing inductive load demagnetizationGo

Changes from Revision * (February 2022) to Revision A (April 2022)

  • 删除了器件信息 表中 VSON 封装的 TIOL112 和 TIOL1125 预告信息 注释Go

5 Pin Configuration and Functions

GUID-20201112-CA0I-7KKS-GGBH-JBT1XZLK8SWG-low.svgFigure 5-1 TIOL112
DRC (VSON), 10-Pin
(Top View)
GUID-20201112-CA0I-QT7Q-BHT4-XFTRJJVQVF9F-low.svgFigure 5-2 TIOL1123, TIOL1125
DRC (VSON), 10-Pin
(Top View)
Table 5-1 Pin Functions (VSON Package)
PIN NOPIN NAMETYPE DESCRIPTION
TIOL112TIOL1123 TIOL1125
1VCC_INVCC_OUTPVCC_IN (TIOL112): External 3.3-V or 5-V logic supply input pin. VCC_OUT (TIOL1123, TIOL1125): 3.3-V or 5-V linear regulator output
2NFAULTNFAULTO Fault indicator output signal to the microcontroller. A low level indicates either an over- current, an undervoltage supply or an overtemperature condition.
3RXRXOReceive data output to the local microcontroller
4TXTXITransmit data input from the local microcontroller. No effect if EN is low. Logic high sets low-side switch. Logic low sets high-side switch. Weak internal pull-up.
5ENENIDriver enable input signal from the local microcontroller. Logic low sets the CQ output at Hi-Z. Weak internal pull-down.
6ILIM_ADJILIM_ADJIInput for current limit adjustment. Connect resistor RSET between ILIM_ADJ and L-.
7L-L-GNDIO-Link ground potential
8CQCQI/OIO-Link data signal (bidirectional)
9L+L+PIO-Link supply voltage (24 V nominal)
10WAKEWAKEOWake-up indicator to the local microcontroller. Open-drain output, connect this pin via pull-up resistor to VCC_IN/OUT.
Thermal PadThermal Pad—Connect to L- for optimal thermal and electrical performance
GUID-20201116-CA0I-9HKG-WK0M-ML3LQZNXJF0Q-low.svgFigure 5-3 TIOL1123L
YAH (DSBGA), 12-Pin
(Top View)
GUID-20210217-CA0I-S3KQ-XFXP-01XTSW12GQNC-low.svgFigure 5-4 TIOL112
YAH (DSBGA), 12-Pin
(Top View)
Table 5-2 Pin Functions (DSBGA)
PIN NOPIN NAMETYPEDESCRIPTION
TIOL112TIOL1123L
B3VCC_INVCC_OUTPVCC_IN (TIOL112): External 3.3-V or 5-V logic supply input pin. VCC_OUT (TIOL1123): 3.3-V or 5-V linear regulator output
C3NFAULTNFAULTO Fault indicator output signal to the microcontroller. A low level indicates either an over- current, an undervoltage supply or an overtemperature condition.
D1RXRXOReceive data output to the local controller
D2TXTXITransmit data input from the local controller. No effect if EN is low. Logic high sets low-side switch. Logic low sets high-side switch. Weak internal pull-up.
D3ENENIDriver enable input signal from the local controller. Logic low sets the CQ output at Hi-Z. Weak internal pull-down.
B1ILIM_ADJILIM_ADJOInput for current limit adjustment. Connect resistor RSET between ILIM_ADJ and L-.
A1,

B2

L-L-

GND

IO-Link ground potential
A2CQCQI/OIO-Link data signal (bidirectional)
A3L+L+PIO-Link supply voltage (24 V nominal)
C1NCVSELITIOL112 (NC): Leave floating. Do not connect. TIOL1123 (VSEL): Connect to GND for 5V LDO output. Please leave this pin floating for 3.3V LDO output. VSEL has an internal pull-up of 1 MΩ
C2WAKEWAKE

O

Wake-up indicator to the local controller. Open-drain output, connect this pin via pull-up resistor to VCC_IN/OUT.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage Steady state voltage for L+ and CQ –65 65 V
Transient pulse width < 100 µs for L+ and CQ –70 70 V
Voltage difference |V(L+) – V(CQ)| 65 V
Logic supply voltage (TIOL112) VCC_IN –0.3 6 V
Input logic voltage TX, EN, VSEL –0.3 min(VCC_IN+0.3, 6) V
Output current RX, WAKE, NFAULT –5 5 mA
Storage temperature, Tstg -55 170 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality, performance, and shorten the device lifetime. All voltages are with reference to the L- pin, unless otherwise specified.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) All pins ±4000 V
V(ESD) Electrostatic discharge Charged Device Model (CDM), per ANSI/ESDA/JEDEC JS-002 (2) All pins ±750 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings - IEC Specifications

VALUE UNIT
V(ESD) Electrostatic discharge IEC 61000-4-2 ESD (Contact Discharge), L+, CQ and L-  (1)  ±8,000 V
Electrostatic discharge IEC 61000-4-5, 1.2 µs/50 µs Surge with 500 Ω in series, L+, CQ  and L- (1) ±1,200
Electrostatic discharge IEC 61000-4-4 EFT (Fast transient or burst), L+, CQ and L- (1)  ±4,000
(1) Minimum 100-nF capacitor is required between L+ and L-. Minimum 1-µF capacitor is required between VCC_IN/VCC_OUT and L-.

 
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