TPS92200 器件是一款具有 30V 最大输入电压的 1.5A 同步降压 LED 驱动器。通过集成高侧和低侧 NMOS 开关,TPS92200 器件以超小的解决方案尺寸提供高功率密度和高效率。TPS92200 器件使用峰值电流模式控制和全面内部补偿在各种运行条件下提供高瞬态响应性能。
TPS92200 器件支持灵活的调光方法。TPS92200D1 可实施 PWM 调光模式和模拟调光模式。在 PWM 调光模式下,LED 根据 PWM 占空比周期性地打开和关闭。该器件通过改变与 5% 至 100% 范围内的模拟输入电压电平成比例的内部基准电压来实现模拟调光模式。TPS92200D2 通过改变与 1% 至 100% 范围内的 PWM 信号输入占空比成比例的内部基准电压来实现更深层模拟调光。
在安全和保护方面,TPS92200 器件可实现全面保护,包括 LED 开路、LED+ 接地短路、LED 短路、检测电阻开路和短路以及器件热保护。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
TPS92200D1DDCR | SOT-23-THIN (6) | 1.60mm × 2.90mm |
TPS92200D2DDCR | SOT-23-THIN (6) | 1.60mm × 2.90mm |
TPS92200D1RXLR | VQFN-HR (6) | 1.50mm × 2.00mm |
TPS92200D2RXLR | VQFN-HR (6) | 1.50mm x 2.00mm |
Changes from Revision A (September 2021) to Revision B (January 2022)
PIN | TYPE(1) | DESCRIPTION | ||||
---|---|---|---|---|---|---|
NAME | DDC NO. | RXL NO. | ||||
BOOT | 6 | 1 | O | A bootstrap capacitor is required between BOOT and SW. | ||
FB | 1 | 6 | I | LED current detection feedback | ||
GND | 3 | 4 | G | Power ground | ||
DIM | 2 | 5 | I | Dimming input. In PWM dimming mode, LED current is turned ON and OFF according to PWM duty cycle periodically (TPS92200D1). In analog dimming mode, the internal reference is proportional to the analog voltage on DIM pin (TPS92200D1) or the PWM duty input (TPS92200D2). | ||
SW | 5 | 2 | O | Switching node to external inductor | ||
VIN | 4 | 3 | P | Input supply voltage |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Input voltage range, VI | IN | –0.3 | 32 | V | |
DIM | –0.3 | 7 | V | ||
FB | –0.3 | 7 | V | ||
Output voltage range, VO | BOOT-SW | –0.3 | 7 | V | |
SW | –0.3 | 32 | V | ||
SW (20 ns transient) | –5 | 32 | V | ||
Operating junction temperature, TJ | –40 | 150 | °C | ||
Storage temperature range, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) | ±500 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage range | IN | 4 | 30 | V |
DIM | –0.1 | 6 | V | |
FB | –0.1 | 6 | V | |
Output voltage range | BOOT-SW | –0.1 | 6 | V |
SW | –0.1 | 30 | V | |
Operating Junction temperature, TJ | –40 | 125 | °C |
THERMAL METRIC(1) | TPS92200 | TPS92200 | UNIT | |
---|---|---|---|---|
DDC (SOT23-6) | RXL (VQFN-HR-6) | |||
6 PINS | 6 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 123.4 | 136.1 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 60.5 | 95.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 41.4 | 49.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 12.3 | 4.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 40.9 | 48.1 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
INPUT SUPPLY | ||||||
VIN | Input voltage range | 4 | 30 | V | ||
VIN_UVLO | VIN undervoltage lockout | Rising VIN | 3.5 | 3.7 | 3.9 | V |
Falling VIN | 3.3 | 3.5 | 3.7 | V | ||
Hysteresis | 0.2 | V | ||||
ISD | Shut down current from VIN | VIN = 12 V, VDIM = 0 V | 1 | 3 | µA | |
IDISC | Discharge current from SW and BOOT | VIN floating, VDIM = 0 V | 1 | 3 | uA | |
IOP | Normal operating current | VDIM = 3.3 V | 0.5 | 1 | mA | |
DIMMING | ||||||
VDIM_L | Low-level input voltage | 0.3 | V | |||
VDIM_H | High-level input voltage | 0.65 | V | |||
VANA | Analog dimming range (TPS92200D1 only) | 0.65 | 1.2 | V | ||
tDIM_ON1 | DIM minimum on time to enable device (TPS92200D2 only) | VDIM = 3.3 V | 190 | 300 | nS | |
tDIM_ON2 | DIM minimum on time when PWM dimming (TPS92200D2 only) | VDIM = 3.3 V | 150 | nS | ||
tDIM_OFF | DIM minimum off time to disable device | VDIM = 0 V | 36 | mS | ||
FEEDBACK AND ERROR AMPLIFIER | ||||||
VFB_REF | FB pin reference voltage | VDIM = 3.3 V | 96 | 99 | 102 | mV |
VFB_OVP | FB pin over voltage protection threshold | VDIM = 3.3 V | 140 | mV | ||
VFB_DMAX | FB reference voltage when maximum dimming input (TPS92200D1 only) | VDIM = 1.2 V | 99 | mV | ||
VFB_DMIN | FB reference voltage when minimum dimming input (TPS92200D1 only) | VDIM = 0.65 V | 5 | mV | ||
FB reference voltage when minimum dimming duty cycle (TPS92200D2 only) | DIM pin duty cycle <= 3% | 1 | mV | |||
POWER STAGE | ||||||
RHS | High-side FET on resistance | VIN ≥ 5 V | 150 | mΩ | ||
RLS | Low-side FET on resistance | VIN ≥ 5 V | 90 | mΩ | ||
CURRENT LIMIT | ||||||
ILIM_HS | High-side current limit | 2.9 | 3.3 | 4 | A | |
ILIM_LS_SOUR | Low-side sourcing current limit | 2.4 | 3 | 3.6 | A | |
ILIM_LS_SINK | Low-side sinking current limit | 1.4 | 1.8 | 2.4 | A | |
THERMAL PROTECTION | ||||||
TTSD | Thermal shutdown temperature | 165 | °C | |||
Hysteresis | 15 | °C |
MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|
Auto-Retry Timing | ||||||
tRETRY_ON | Auto-retry on-time | 512 | Cycles | |||
tRETRY_OFF | Auto-retry off-time | 60 | ms | |||
SOFT START | ||||||
tSS | Internal soft-start time | 0.5 | ms |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
fsw | Switching frequency | 0.8 | 1 | 1.2 | MHz | |
DMAX | Maximum duty cycle | 99% | ||||
tMIN_ON | Minimum on time | 75 | 100 | ns | ||
tMIN_OFF | Minimum off time | 65 | 90 | ns | ||
tMAX_ON | Maximum on time | 6.6 | us |
VIN = 12 V, unless otherwise specified.
The TPS92200 device is a 1.5-A synchronous buck LED driver with 30-V maximum input voltage. By integrating the high-side and low-side NMOS switches, the TPS92200 device provides high power density with high efficiency in an ultra-small solution size.
The TPS92200 device is fully internally compensated without additional external components, which enables a simple design on a limited board space. The device uses peak current mode control to regulate the LED current with high accuracy. Switching frequency is internally set to 1 MHz, allowing the use of extremely small surface-mount inductors and chip capacitors.
The TPS92200 devices support flexible dimming methods. TPS92200D1 implement both PWM and analog dimming modes. In PWM dimming mode, the LED turns on and off according to PWM duty cycle periodically. The device's analog dimming mode is achieved by changing the internal reference voltage proportional to the voltage level of the analog input in 5% to 100% range. TPS92200D2 implement deeper analog dimming by changing the internal reference voltage proportional to the duty cycle of the PWM signal input in 1% to 100% range.
For safety and protection, the TPS92200 devices implement full protections include LED open, LED+ short-to-GND, LED short, sense resistor open and short, and device thermal protection. Hiccup mode is triggered at current limit or FB pin overvoltage scenario to avoid the device overheats.
The TPS92200 device uses peak-current-mode control and full internal compensation to provide high transient response performance over a wide range of operating conditions. The switching frequency is internally set to 1 MHz when the minimum off time tMIN_OFF is not triggered, thus minimizing the external inductor and capacitor size.
During each switching cycle, when the high-side power switch is turned on, the load current is sensed through the external sense resistor, RSENSE. The sensed voltage on the FB pin is compared with the internal voltage reference, VREF, through the error amplifier. The output of the error amplifier, VCOMP, is compared with the real-time current, IHS_SENSE, going through the high-side power switch. Slope compensation circuitry is implemented in the device to prevent sub-harmonic oscillations as the duty cycle increases in peak-current-control mode. When the peak value of VHS_SENSE reaches VCOMP in the PWM comparator, the high-side power switch is turned off and the low-side NMOS is turned on at the same time. The low-side power switch stays turned on until the end of the PWM cycle. Thus, by regulating the real-time peak current in each switching cycle, the device controls the load current at the target value.
The LED current is set by the external resistor between the LEDs cathode and GND. Because the FB pin voltage reference VFB_REF is fixed at 99 mV, the sensing resistor can be calculated using Equation 1.
The TPS92200 device implements the internal soft-start function. The VREF ramps smoothly during the soft-start period. The internal soft-start period is set as tSS, 0.5 ms typically.
The device implements internal Undervoltage Lockout (UVLO) circuitry on the IN pin. The device is disabled when the IN pin voltage falls below the internal IN UVLO threshold, 3.5-V typical. The internal IN UVLO threshold has a hysteresis of 0.2-V typical.
The TPS92200 integrates a bootstrap regulator inside, and requires an external capacitor between the BOOT and SW pins to provide the gate driver voltage for the high-side power switch. TI recommends a 0.1-µF ceramic capacitor with an X7R or X5R dielectric because of the stable characteristics over temperature and voltage.