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  • AMC3330-Q1 具有集成式直流/直流转换器的汽车级、±1V 输入、增强型隔离式精密放大器

    • ZHCSKS7B June   2020  – September 2024 AMC3330-Q1

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  • AMC3330-Q1 具有集成式直流/直流转换器的汽车级、±1V 输入、增强型隔离式精密放大器
  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Ratings
    6. 5.6  Insulation Specifications
    7. 5.7  Safety-Related Certifications 
    8. 5.8  Safety Limiting Values
    9. 5.9  Electrical Characteristics
    10. 5.10 Switching Characteristics
    11. 5.11 Timing Diagram
    12. 5.12 Insulation Characteristics Curves
    13. 5.13 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Analog Input
      2. 6.3.2 Isolation Channel Signal Transmission
      3. 6.3.3 Analog Output
      4. 6.3.4 Isolated DC/DC Converter
      5. 6.3.5 Diagnostic Output and Fail-Safe Behavior
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Filter Design
        2. 7.2.2.2 Differential to Single-Ended Output Conversion
      3. 7.2.3 Application Curve
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
  12. 重要声明
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Data Sheet

AMC3330-Q1 具有集成式直流/直流转换器的汽车级、±1V 输入、增强型隔离式
精密放大器

本资源的原文使用英文撰写。 为方便起见,TI 提供了译文;由于翻译过程中可能使用了自动化工具,TI 不保证译文的准确性。 为确认准确性,请务必访问 ti.com 参考最新的英文版本(控制文档)。

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1 特性

  • 符合面向汽车应用的 AEC-Q100 标准:
    • 温度等级 1:–40°C 至 125°C,TA
  • 3.3V 或 5V 单电源运行,具有集成直流/直流转换器
  • ±1V 输入电压范围,针对使用高输入阻抗的电压测量进行了优化
  • 固定增益:2.0
  • 低直流误差:
    • 增益误差:±0.2%(最大值)
    • 增益漂移:±45ppm/°C(最大值)
    • 失调电压误差:±0.3mV(最大值)
    • 失调电压温漂:±4µV/°C(最大值)
    • 非线性度:±0.02%(最大值)
  • 高 CMTI:85kV/µs(最小值)
  • 系统级诊断功能
  • 安全相关认证:
    • 符合 DIN EN IEC 60747-17 (VDE 0884-17) 的 6000VPK 增强型隔离
    • 4250VRMS 隔离,符合 UL1577 标准且持续时长为 1 分钟
  • 符合 CISPR-11 和 CISPR-25 EMI 标准

2 应用

  • 可用于以下应用的隔离式电压感应:
    • 混合动力汽车/电动汽车车载充电器 (OBC)
    • 混合动力汽车/电动汽车直流/直流转换器
    • 混合动力汽车/电动汽车牵引逆变器
    • 混合动力汽车/电动汽车电池管理系统 (BMS)

3 说明

AMC3330-Q1 是一款具有完全集成的隔离式直流/直流转换器的精密隔离式放大器,能实现器件低侧的单电源运行。该增强型电容隔离层通过了 DIN EN IEC 60747-17 (VDE 0884-17) 和 UL1577 标准认证,将以不同共模电压电平运行的系统各部分隔开,并保护低压域免受损坏。

AMC3330-Q1 的输入针对直接连接高阻抗电压信号源(例如电阻分压器网络)的情况进行了优化,以感应高压信号。集成式隔离直流/直流转换器可测量非接地信号,并使该器件成为嘈杂空间受限应用的独特解决方案。

该器件性能出色,支持进行精确的电压监控。AMC3330-Q1 的集成直流/直流转换器故障检测和诊断输出引脚可简化系统级设计和诊断。

AMC3330-Q1 的额定工作温度范围为 -40°C 至 +125°C。

封装信息
器件型号 封装(1) 封装尺寸(2)
AMC3330-Q1 DWE(SOIC,16) 10.3mm × 10.3mm
(1) 如需更多信息,请参阅机械、封装和可订购信息。
(2) 封装尺寸(长 × 宽)为标称值,并包括引脚(如适用)。

 

AMC3330-Q1 应用示例应用示例

4 Pin Configuration and Functions

AMC3330-Q1 DWE Package,16-Pin SOIC(Top View) Figure 4-1 DWE Package,16-Pin SOIC(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NO. NAME
1 DCDC_OUT Power High-side output of the isolated DC/DC converter; connect this pin to the HLDO_IN pin.(1)
2 DCDC_HGND Power Ground High-side ground reference for the isolated DC/DC converter; connect this pin to the HGND pin.
3 HLDO_IN Power Input of the high-side low-dropout (LDO) regulator; connect this pin to the DCDC_OUT pin.(1)
4 NC — No internal connection. Connect this pin to the high-side ground or leave this pin unconnected (floating).
5 HLDO_OUT Power Output of the high-side LDO.(1)
6 INP Analog Input Noninverting analog input.
7 INN Analog Input Inverting analog input. Connect this pin to HGND.
8 HGND Signal Ground High-side analog ground; connect this pin to the DCDC_HGND pin.
9 GND Signal Ground Low-side analog ground; connect this pin to the DCDC_GND pin.
10 OUTN Analog Output Inverting analog output.
11 OUTP Analog Output Noninverting analog output.
12 VDD Power Low-side power supply.(1)
13 LDO_OUT Power Output of the low-side LDO; connect this pin to the DCDC_IN pin.(1)
14 DIAG Digital Output Active-low, open-drain status indicator output; connect this pin to the pullup supply (for example, VDD) using a resistor or leave this pin floating if not used.
15 DCDC_GND Power Ground Low-side ground reference for the isolated DC/DC converter; connect this pin to the GND pin.
16 DCDC_IN Power Low-side input of the isolated DC/DC converter; connect this pin to the LDO_OUT pin.(1)
(1) See the Power Supply Recommendations section for power-supply decouplng recommendations.

5 Specifications

5.1 Absolute Maximum Ratings

see (1)
MIN MAX UNIT
Power-supply voltage VDD to GND –0.3 6.5 V
Analog input voltage INP, INN HGND – 6 VHLDOout + 0.5 V
Analog output voltage OUTP, OUTN GND – 0.5 VDD + 0.5 V
Digital output voltage DIAG
GND – 0.5

6.5 V
Input current Continuous, any pin except power-supply pins –10 10 mA
Temperature Junction, TJ 150 °C
Storage, Tstg –65 150
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime

5.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1), HBM ESD classification Level 2 ±2000 V
Charged-device model (CDM), per AEC Q100-011, CDM ESD classification Level C6 ±1000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

5.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)
MIN NOM MAX UNIT
POWER SUPPLY
VDD Low-side supply voltage VDD to GND 3.0 3.3 5.5 V
ANALOG INPUT
VClipping Differential input voltage before clipping output VIN = VINP – VINN ±1.25 V
VFSR Specified linear differential full-scale voltage VIN = VINP – VINN –1 1 V
Absolute common-mode input voltage(1) (VINP + VINN) / 2 to HGND –2 3 V
VCM Operating common-mode input voltage (VINP + VINN) / 2 to HGND,
VINP = VINN
–1.4 1.6 V
(VINP + VINN) / 2 to HGND,
|VINP – VINN| = 1.0 V (2)
–0.925 0.725
(VINP + VINN) / 2 to HGND,
|VINP – VINN| = 1.25 V
–0.8 0.6
ANALOG OUTPUT
CLOAD Capacitive load On OUTP or OUTN to GND2, Without any series resistance 500 pF
CLOAD Capacitive load OUTP to OUTN, Without any series resistance 250 pF
RLOAD Resistive load On OUTP or OUTN to GND2 10 1 kΩ
DIGITAL OUTPUT
Pull-up supply-voltage for DIAG pin 0 VDD V
TEMPERATURE RANGE
TA Operating ambient temperature –40 25 125 °C
(1) Steady-state voltage supported by the device in case of a system failure. See specified common-mode input voltage VCM for normal operation. Observe analog input voltage range as specified in the Absolute Maximum Ratings table.
(2) Linear response.

5.4 Thermal Information

THERMAL METRIC(1) AMC3330-Q1 UNIT
DWE (SOIC)
16 PINS
RθJA Junction-to-ambient thermal resistance 73.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 31 °C/W
RθJB Junction-to-board thermal resistance 44 °C/W
ψJT Junction-to-top characterization parameter 16.7 °C/W
ψJB Junction-to-board characterization parameter 42.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

5.5 Power Ratings

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PD Maximum power dissipation VDD = 5.5 V 236.5 mW
VDD = 3.6 V 155

5.6 Insulation Specifications

over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VALUE UNIT
GENERAL
CLR External clearance(1) Shortest pin-to-pin distance through air ≥ 8 mm
CPG External creepage(1) Shortest pin-to-pin distance across the package surface ≥ 8 mm
DTI Distance through insulation Minimum internal gap (internal clearance - capacitive signal isolation) ≥ 21 µm
DTI Distance through insulation Minimum internal gap (internal clearance - transformer power isolation) ≥ 120 µm
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 ≥ 600 V
Material group According to IEC 60664-1 I
Overvoltage category
per IEC 60664-1
Rated mains voltage ≤ 600VRMS I-III
Rated mains voltage ≤ 1000VRMS I-II
DIN EN IEC 60747-17 (VDE 0884-17)
VIORM Maximum repetitive peak isolation voltage At AC voltage 1700 VPK
VIOWM Maximum-rated isolation
working voltage
At AC voltage (sine wave) 1200 VRMS
At DC voltage 1700 VDC
VIOTM Maximum transient
isolation voltage
VTEST = VIOTM, t = 60s (qualification test),
VTEST = 1.2 × VIOTM, t = 1s (100% production test)
6000 VPK
VIMP Maximum impulse voltage(2) Tested in air, 1.2/50µs waveform per IEC 62368-1 7700 VPK
VIOSM Maximum surge
isolation voltage(3)
Tested in oil (qualification test),
1.2/50µs waveform per IEC 62368-1
10000 VPK
qpd Apparent charge(4) Method a, after input/output safety test subgroups 2 and 3,
Vpd(ini) = VIOTM, tini = 60s, Vpd(m) = 1.2 × VIORM, tm = 10s
≤ 5 pC
Method a, after environmental tests subgroup 1,
Vpd(ini) = VIOTM, tini = 60s, Vpd(m) = 1.6 × VIORM, tm = 10 s
≤ 5
Method b1, at preconditioning (type test) and routine test,
Vpd(ini) = 1.2 x VIOTM, tini = 1s, Vpd(m) = 1.875 × VIORM, tm = 1s
≤ 5
Method b2, at routine test (100% production)(6),
Vpd(ini) = Vpd(m) = 1.2 x VIOTM, tini =  tm = 1s
≤ 5
CIO Barrier capacitance,
input to output(5)
VIO = 0.5 VPP at 1MHz ~4.5 pF
RIO Insulation resistance,
input to output(5)
VIO = 500 V at TA = 25°C > 1012 Ω
VIO = 500 V at 100°C ≤ TA ≤ 125°C > 1011
VIO = 500 V at TS = 150°C > 109
Pollution degree 2
Climatic category 40/125/21
UL1577
VISO Withstand isolation voltage VTEST = VISO, t = 60s (qualification test),
VTEST = 1.2 × VISO, t = 1s (100% production test)
4250 VRMS
(1) Apply creepage and clearance requirements according to the specific equipment isolation standards of an application.Maintain the creepage and clearance distance of a board design to make sure that the mounting pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a PCB are used to help increase these specifications.
(2) Testing is carried out in air to determine the surge immunity of the package.
(3) Testing is carried in oil to determine the intrinsic surge immunity of the isolation barrier.
(4) Apparent charge is electrical discharge caused by a partial discharge (pd).
(5) All pins on each side of the barrier are tied together, creating a two-pin device.
(6) Either method b1 or b2 is used in production.

5.7 Safety-Related Certifications 

VDE UL
DIN EN IEC 60747-17 (VDE 0884-17),
EN IEC 60747-17,
DIN EN IEC 62368-1 (VDE 0868-1),
EN IEC 62368-1,
IEC 62368-1 Clause : 5.4.3 ; 5.4.4.4 ; 5.4.9
Recognized under 1577 component recognition and
CSA component acceptance NO 5 programs
Reinforced insulation Single protection
Certificate number: 40040142 File number: E181974

5.8 Safety Limiting Values

Safety limiting (1) intends to minimize potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to over-heat the die and damage the isolation barrier potentially leading to secondary system failures.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IS Safety input, output, or supply current RθJA = 73.5°C/W, VDD = 5.5 V,
TJ = 150°C, TA = 25°C
309 mA
RθJA = 73.5°C/W, VDD = 3.6 V,
TJ = 150°C, TA = 25°C
472
PS Safety input, output, or total power RθJA = 73.5°C/W,
TJ = 150°C, TA = 25°C
1700 mW
TS Maximum safety temperature 150 °C
(1) The maximum safety temperature, TS, has the same value as the maximum junction temperature, TJ, specified for the device. The IS and PS parameters represent the safety current and safety power, respectively. Do not exceed the maximum limits of IS and PS. These limits vary with the ambient temperature, TA.
The junction-to-air thermal resistance, RθJA, in the Thermal Information table is that of a device installed on a high-K test board for leaded surface-mount packages. Use these equations to calculate the value for each parameter:
TJ = TA + RθJA × P, where P is the power dissipated in the device.
TJ(max) = TS = TA + RθJA × PS, where TJ(max) is the maximum junction temperature.
PS = IS × VDDmax, where VDDmax is the maximum low-side voltage.

5.9 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, VDD = 3.0 V to 5.5 V, INP = –1 V to +1 V, and INN = HGND = 0 V; typical specifications are at TA = 25°C, and VDD = 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
RIN Single-ended input resistance INN = HGND 0.1 0.8 GΩ
RIND Differential input resistance 0.1 1.2
IIB Input bias current INP = INN = HGND, IIB = (IIBP + IIBN) / 2 –10 2.5 10 nA
TCIIB Input bias current drift –14 pA/°C
IIO Input offset current IIO = IINP – IINN; INP = INN = HGND –10 -0.8 10 nA
CIN Single-ended input capacitance INN = HGND, fIN = 310 kHz 2 pF
CIND Differential input capacitance fIN = 310 kHz 2
ANALOG OUTPUT
Nominal gain 2 V/V
VCMout Common-mode output voltage 1.39 1.44 1.49 V
VCLIPout Clipping differential output voltage VOUT = (VOUTP – VOUTN);
|VIN| = |VINP – VINN| > VClipping
±2.49 V
VFailsafe Failsafe differential output voltage V+ = (VOUTP – VOUTN); VDCDCout ≤ VDCDCUV or VHLDOout ≤ VHLDOUV –2.57 –2.5 V
BWOUT Output bandwidth 300 375 kHz
ROUT Output resistance On OUTP or OUTN 0.2 Ω
Output short-circuit current On OUTP or OUTN, sourcing or sinking, INP = INN = HGND, outputs shorted to either GND or VDD 14 mA
CMTI Common-mode transient immunity |HGND – GND| = 2 kV 85 135 kV/µs
ACCURACY
VOS Input offset voltage(1)(2) TA = 25°C, INP = INN = HGND –0.3 ±0.05 0.3 mV
TCVOS Input offset drift(1)(2)(4) –4 ±1 4 µV/°C
EG Gain error TA = 25°C –0.2% –0.08% 0.2%
TCEG Gain error drift(1)(5) –45 ±7 45 ppm/°C
Nonlinearity –0.02% 0.01% 0.02%
Nonlinearity drift 0.4 ppm/°C
SNR Signal-to-noise ratio VIN = 2 VPP, fIN = 1 kHz,
BW = 10 kHz, 10 kHz filter
81 85 dB
VIN = 2 VPP, fIN = 10 kHz,
BW = 100 kHz, 1 MHz filter
72
THD Total harmonic distortion(3) VIN = 2 Vpp, fIN = 10 kHz,
BW = 100 kHz
–84 dB
Output noise INP = INN = HGND, fIN = 0 Hz,
BW = 100 kHz
250 µVRMS
CMRR Common-mode rejection ratio fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max –100 dB
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max –86
PSRR Power-supply rejection ratio VDD from 3.0 V to 5.5 V, at dc, input referred –98 dB
INP = INN = HGND, VDD from 3.0 V to 5.5 V, 10 kHz / 100 mV ripple, input referred –86
DIGITAL OUTPUT ( DIAG)
VOL Low-level output voltage ISINK= 4 mA 80 250 mV
ILKG Open-drain output leakage current VDD = 5V 5 100 nA
POWER SUPPLY
IDD Low-side supply current No external load on HLDO 28.5 41 mA
1 mA  external load on HLDO 30.5 43 mA
VDDUV VDD analog undervoltage detection threshold VDD rising 2.9 V
VDD falling 2.8
VDDPOR VDD digital reset threshold VDD rising 2.5 V
VDD falling 2.4
VDCDC_OUT DC/DC output voltage DCDC_OUT to HGND 3.1 3.5 4.65 V
VDCDCUV DC/DC output undervoltage detection threshold voltage DCDC output falling 2.1 2.25 V
VHLDO_OUT High-side LDO output voltage HLDO to HGND, up to 1 mA external load 3 3.2 3.4 V
VHLDOUV High-side LDO output undervoltage detection threshold voltage HLDO output falling 2.4 2.6 V
IH High-side supply current for auxiliary circuitry 3 V ≤ VDD < 4.5 V, load connected from HLDO_OUT to HGND, non-switching 1 mA
4.5 V ≤ VDD ≤ 5.5 V, load connected from HLDO_OUT to HGND, non-switching 4.3
tAS Analog settling time VDD step to 3.0 V, to OUTP and OUTN valid, 0.1% settling 0.6 1.1 ms
(1) The typical value includes one standard deviation ("sigma") at nominal operating conditons.
(2) This parameter is input referred.
(3) THD is the ratio of the rms sum of the amplitues of first five higher harmonics to the amplitude of the fundamental.
(4) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCVOS = (VOS,MAX - VOS,MIN) / TempRange where VOS,MAX and VOS,MIN refer to the maximum and minimum VOS values measured within the temperature range (–40 to 125℃).
(5) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = ((EG,MAX - EG,MIN) / TempRange) x 104 where EG,MAX and EG,MIN refer to the maximum and minimum EG values (in %) measured within the temperature range (–40 to 125℃).

5.10 Switching Characteristics

over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr Output signal rise time 1.3 µs
tf Output signal fall time 1.3 µs
VINx to VOUTx signal delay (50% – 10%) Unfiltered output 1.2 1.3 µs
VINx to VOUTx signal delay (50% – 50%) Unfiltered output 1.6 2.1 µs
VINx to VOUTx signal delay (50% – 90%) Unfiltered output 2.2 2.6 µs

5.11 Timing Diagram

AMC3330-Q1 Rise, Fall, and Delay Time Waveforms Figure 5-1 Rise, Fall, and Delay Time Waveforms

5.12 Insulation Characteristics Curves

AMC3330-Q1 Thermal Derating Curve for Safety-Limiting Current per VDE
 
Figure 5-2 Thermal Derating Curve for Safety-Limiting Current per VDE
AMC3330-Q1 Reinforced Isolation Capacitor Lifetime Projection
Figure 5-4 Reinforced Isolation Capacitor Lifetime Projection
AMC3330-Q1 Thermal Derating Curve for Safety-Limiting Power per VDE
 
Figure 5-3 Thermal Derating Curve for Safety-Limiting Power per VDE

 

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