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  • MSP430FR267x 电容式触控感应混合信号微控制器

    • ZHCSJG6D March   2019  – September 2021 MSP430FR2672 , MSP430FR2673 , MSP430FR2675 , MSP430FR2676

      PRODUCTION DATA  

  • CONTENTS
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  • MSP430FR267x 电容式触控感应混合信号微控制器
  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 功能模块图
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagrams
    2. 7.2 Pin Attributes
    3. 7.3 Signal Descriptions
    4. 7.4 Pin Multiplexing
    5. 7.5 Buffer Types
    6. 7.6 Connection of Unused Pins
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 8.5  Active Mode Supply Current Per MHz
    6. 8.6  Low-Power Mode LPM0 Supply Currents Into VCC Excluding External Current
    7. 8.7  Low-Power Mode (LPM3, LPM4) Supply Currents (Into VCC) Excluding External Current
    8. 8.8  Low-Power Mode LPMx.5 Supply Currents (Into VCC) Excluding External Current
    9. 8.9  Typical Characteristics – Low-Power Mode Supply Currents
    10. 8.10 Current Consumption Per Module
    11. 8.11 Thermal Resistance Characteristics
    12. 8.12 Timing and Switching Characteristics
      1. 8.12.1  Power Supply Sequencing
        1. 8.12.1.1 PMM, SVS and BOR
      2. 8.12.2  Reset Timing
        1. 8.12.2.1 Wake-up Times From Low-Power Modes and Reset
      3. 8.12.3  Clock Specifications
        1. 8.12.3.1 XT1 Crystal Oscillator (Low Frequency)
        2. 8.12.3.2 DCO FLL, Frequency
        3. 8.12.3.3 DCO Frequency
        4. 8.12.3.4 REFO
        5. 8.12.3.5 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
        6. 8.12.3.6 Module Oscillator (MODOSC)
      4. 8.12.4  Digital I/Os
        1. 8.12.4.1 Digital Inputs
        2. 8.12.4.2 Digital Outputs
        3. 8.12.4.3 Typical Characteristics – Outputs at 3 V and 2 V
      5. 8.12.5  Internal Shared Reference
        1. 8.12.5.1 Internal Reference Characteristics
      6. 8.12.6  Timer_A and Timer_B
        1. 8.12.6.1 Timer_A
        2. 8.12.6.2 Timer_B
      7. 8.12.7  eUSCI
        1. 8.12.7.1 eUSCI (UART Mode) Clock Frequency
        2. 8.12.7.2 eUSCI (UART Mode) Timing Characteristics
        3. 8.12.7.3 eUSCI (SPI Master Mode) Clock Frequency
        4. 8.12.7.4 eUSCI (SPI Master Mode)
        5. 8.12.7.5 eUSCI (SPI Slave Mode)
        6. 8.12.7.6 eUSCI (I2C Mode)
      8. 8.12.8  ADC
        1. 8.12.8.1 ADC, Power Supply and Input Range Conditions
        2. 8.12.8.2 ADC, Timing Parameters
        3. 8.12.8.3 ADC, Linearity Parameters
      9. 8.12.9  Enhanced Comparator (eCOMP)
        1. 8.12.9.1 eCOMP0 Characteristics
      10. 8.12.10 CapTIvate
        1. 8.12.10.1 CapTIvate Electrical Characteristics
        2. 8.12.10.2 CapTIvate Signal-to-Noise Ratio Characteristics
      11. 8.12.11 FRAM
        1. 8.12.11.1 FRAM Characteristics
      12. 8.12.12 Debug and Emulation
        1. 8.12.12.1 JTAG, 4-Wire and Spy-Bi-Wire Interface
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  CPU
    3. 9.3  Operating Modes
    4. 9.4  Interrupt Vector Addresses
    5. 9.5  Bootloader (BSL)
    6. 9.6  JTAG Standard Interface
    7. 9.7  Spy-Bi-Wire Interface (SBW)
    8. 9.8  FRAM
    9. 9.9  Memory Protection
    10. 9.10 Peripherals
      1. 9.10.1  Power-Management Module (PMM)
      2. 9.10.2  Clock System (CS) and Clock Distribution
      3. 9.10.3  General-Purpose Input/Output Port (I/O)
      4. 9.10.4  Watchdog Timer (WDT)
      5. 9.10.5  System (SYS) Module
      6. 9.10.6  Cyclic Redundancy Check (CRC)
      7. 9.10.7  Enhanced Universal Serial Communication Interface (eUSCI_A0, eUSCI_B0)
      8. 9.10.8  Timers (TA0, TA1, TA2, TA3 and TB0)
      9. 9.10.9  Hardware Multiplier (MPY)
      10. 9.10.10 Backup Memory (BAKMEM)
      11. 9.10.11 Real-Time Clock (RTC)
      12. 9.10.12 12-Bit Analog-to-Digital Converter (ADC)
      13. 9.10.13 eCOMP0
      14. 9.10.14 CapTIvate Technology
      15. 9.10.15 Embedded Emulation Module (EEM)
    11. 9.11 Input/Output Diagrams
      1. 9.11.1 Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 9.11.2 Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 9.11.3 Port P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger
      4. 9.11.4 Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 9.11.5 Port P5 (P5.0 to P5.7) Input/Output With Schmitt Trigger
      6. 9.11.6 Port P6 (P6.0 to P6.2) Input/Output With Schmitt Trigger
    12. 9.12 Device Descriptors
    13. 9.13 Memory
      1. 9.13.1 Memory Organization
      2. 9.13.2 Peripheral File Map
    14. 9.14 Identification
      1. 9.14.1 Revision Identification
      2. 9.14.2 Device Identification
      3. 9.14.3 JTAG Identification
  10. 10Applications, Implementation, and Layout
    1. 10.1 Device Connection and Layout Fundamentals
      1. 10.1.1 Power Supply Decoupling and Bulk Capacitors
      2. 10.1.2 External Oscillator
      3. 10.1.3 JTAG
      4. 10.1.4 Reset
      5. 10.1.5 Unused Pins
      6. 10.1.6 General Layout Recommendations
      7. 10.1.7 Do's and Don'ts
    2. 10.2 Peripheral- and Interface-Specific Design Information
      1. 10.2.1 ADC Peripheral
        1. 10.2.1.1 Partial Schematic
        2. 10.2.1.2 Design Requirements
        3. 10.2.1.3 Layout Guidelines
      2. 10.2.2 CapTIvate Peripheral
        1. 10.2.2.1 Device Connection and Layout Fundamentals
        2. 10.2.2.2 125
        3. 10.2.2.3 Measurements
          1. 10.2.2.3.1 SNR
          2. 10.2.2.3.2 Sensitivity
          3. 10.2.2.3.3 Power
    3. 10.3 CapTIvate Technology Evaluation
  11. 11Device and Documentation Support
    1. 11.1 Getting Started and Next Steps
    2. 11.2 Device Nomenclature
    3. 11.3 Tools and Software
    4. 11.4 Documentation Support
    5. 11.5 支持资源
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Export Control Notice
    9. 11.9 术语表
  12. 12Mechanical, Packaging, and Orderable Information
  13. 重要声明
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DATA SHEET

MSP430FR267x 电容式触控感应混合信号微控制器

本资源的原文使用英文撰写。 为方便起见,TI 提供了译文;由于翻译过程中可能使用了自动化工具,TI 不保证译文的准确性。 为确认准确性,请务必访问 ti.com 参考最新的英文版本(控制文档)。

1 特性

  • CapTIvate™ 技术 – 电容式触控
    • 高性能
      • 四路同步快速电极扫描
      • 支持点数高达 1024 的高分辨率滑块
      • 接近传感
    • 可靠性
      • 提高了针对电力线、射频及其他环境噪声的抗扰度
      • 内置扩展频谱、自动调优、噪声滤除和消抖算法
      • 提供可靠的触控解决方案,该方案具有 10V RMS 共模噪声、4kV 电气快速瞬变以及 15kV 静电放电,符合 IEC‑61000-4-6、IEC-61000-4-4 和 IEC‑61000-4-2 标准
      • 降低了射频辐射,简化了电气设计
      • 支持金属触控和防水设计
    • 灵活性
      • 多达 16 个自电容式电极和 64 个互电容式电极
      • 在同一设计中混合使用自电容式电极和互电容式电极
      • 支持多点触控功能
      • 宽电容检测范围;0 至 300pF 宽电极范围
    • 低功耗
      • 触摸唤醒模式下的电流 <0.9µA/按钮,其中电容测量和触控检测由硬件状态机完成,同时 CPU 处于休眠状态
      • 触摸唤醒状态机支持在 CPU 休眠过程中进行电极扫描
      • 用于环境补偿、滤波和阈值检测的硬件加速
    • 易于使用
      • CapTIvate 设计中心 PC GUI 允许工程师对电容按钮进行实时设计和调试,无需编写代码
      • 存储于 ROM 中的 CapTIvate 软件库为客户应用提供充足的 FRAM
  • 嵌入式微控制器
    • 16 位 RISC 架构
    • 支持的时钟频率最高可达 16MHz
    • 1.8 V 至 3.6 V 的宽电源电压范围(最低电源电压受限于 SVS 电平,请参阅 SVS 规格)
  • 优化的超低功耗模式
    • 工作模式:135µA/MHz(典型值)
    • 待机:四个传感器的触摸唤醒电流小于 5µA
    • 关断 (LPM4.5):37nA,未使用 SVS
  • 低功耗铁电 RAM (FRAM)
    • 容量高达 64KB 的非易失性存储器
    • 内置错误修正码 (ECC)
    • 可配置的写保护
    • 对程序、常量和存储的统一存储
    • 耐写次数达 1015 次
    • 抗辐射和非磁性
  • 智能数字外设
    • 四个 16 位计时器,每个计时器有 3 个捕捉/比较寄存器 (Timer_A3)
    • 一个 16 位计时器,具有 7 个捕捉/比较寄存器 (Timer_B7)
    • 一个采用 CapTIvate 技术的 16 位计时器
    • 一个仅用作计数器的 16 位 RTC
    • 16 位循环冗余校验 (CRC)
  • 增强型串行通信,支持引脚重映射功能
    • 两个 eUSCI_A 接口,支持 UART、IrDA 和 SPI
    • 两个 eUSCI_B 接口,支持 SPI 和 I2C
  • 高性能模拟
    • 高达 12 通道 12 位模数转换器 (ADC)
      • 内部共享基准(1.5、2.0 或 2.5V)
      • 采样与保持 200ksps
    • 一个增强型比较器 (eCOMP)
      • 集成 6 位 DAC 作为基准电压
      • 可编程迟滞
      • 可配置的高功率和低功率模式
  • 时钟系统 (CS)
    • 片上 32kHz RC 振荡器 (REFO),具有 1µA 支持
    • 带有锁频环 (FLL) 的片上 16MHz 数控振荡器 (DCO)
      • 室温下的精度为 ±1%(具有片上基准)
    • 片上超低频 10kHz 振荡器 (VLO)
    • 片上高频调制振荡器 (MODOSC)
    • 外部 32kHz 晶振 (LFXT)
    • 可编程 MCLK 预分频器(1 至 128)
    • 通过可编程预分频器(1、2、4 或 8)从 MCLK 获得的 SMCLK
  • 通用输入/输出和引脚功能
    • LQFP-48 封装上的 43 个 I/O
    • 所有 GPIO 上的 43 个中断引脚可以将 MCU 从低功耗模式下唤醒
  • 开发工具和软件
    • 开发工具
      • MSP CapTIvate™ MCU 开发套件评估:与 CAPTIVATE‑PGMR 编程器和电容式触控 MSP430FR2676 MCU 板 CAPTIVATE‑FR2676 配合使用
      • 目标开发板 MSP‑TS430PT48A
    • 易于使用的生态系统
      • CapTIvate 设计中心 – 代码生成、可自定义 GUI、实时调优
  • 16KB ROM 库包含 CapTIvate 触控程序库和驱动程序库
  • 系列成员(另请参阅器件比较)
    • MSP430FR2676:64KB 程序 FRAM、512B 信息 FRAM、8KB RAM,
      支持多达 16 个自电容式传感器和 64 个互电容式传感器
    • MSP430FR2675:32KB 程序 FRAM、512B 信息 FRAM、6KB RAM,
      支持多达 16 个自电容式传感器和 64 个互电容式传感器
    • MSP430FR2673:16KB 程序 FRAM、512B 信息 FRAM、4KB RAM,
      多达 16 个自电容式传感器和 64 个互电容式传感器
    • MSP430FR2672:8KB 程序 FRAM、512B 信息 FRAM、2KB RAM,
      多达 16 个自电容式传感器和 24 个互电容式传感器
  • 封装选项
    • 48 引脚:LQFP (PT)
    • 40 引脚:VQFN (RHA)
    • 32 引脚:VQFN (RHB)

2 应用

  • 大型电器
  • 入侵 HMI 键盘和控制面板
  • 电子智能锁、门键盘和读取器
  • 车库门系统
  • 电动百叶窗
  • 遥控器
  • 个人电子产品
  • 无线扬声器和耳机
  • 手持式视频游戏控制器
  • A/V 接收器
  • 白色家电
  • 园艺和电动工具

3 说明

MSP430FR267x 是用于电容式触控检测的超低功耗 MSP430™ 微控制器,采用 CapTIvate 触控技术,适用于按钮、滑块、滚轮及邻近应用。采用 CapTIvate 技术的 MSP430 MCU 提供市面上最高集成度和自主性的电容式触控解决方案,具有高可靠性和抗噪能力以及最低功耗。TI 的电容式触控技术支持在同一设计方案中同时使用自电容式和互电容式电极,最大限度地提高了灵活性。采用 CapTIvate 技术的 MSP430 MCU 可以穿透厚玻璃、塑料外壳、金属和木材,在恶劣的环境(包括潮湿、油腻和脏污环境)中工作。

TI 电容式触控感应 MSP430 MCU 由一个由各种软、硬件资源组成的生态系统提供支持,并配套提供有参考设计和代码示例,可帮助您快速开展设计。开发套件包括 MSP-CAPT-FR2633 CapTIvate 技术开发套件。TI 还提供免费的软件,如 CapTIvate 设计中心,工程师可以在其中通过简单易用的 GUI 和 MSP430Ware™ 软件,以及包括 CapTIvate 技术指南在内的综合性文档快速进行应用开发。我们为 MSP430 MCU 提供广泛的在线配套资料(例如内务处理型示例系列、MSP Academy 培训),也通过 TI E2E™ 支持论坛提供在线支持。

TI MSP430 系列低功耗微控制器包含多种器件,其中配备了不同的外设集以满足各类应用的需求。此架构与多种低功耗模式配合使用,是延长便携式测量应用电池寿命的最优选择。该 MCU 具有一个强大的 16 位 RISC CPU、16 位寄存器和常数发生器,有助于获得最大编码效率。数控振荡器 (DCO) 可使 MCU 在不到 10μs(典型值)的时间内从低功耗模式唤醒至活动模式。

有关完整的模块说明,请参阅 MSP430FR4xx 和 MSP430FR2xx 系列器件用户指南。

器件信息
器件型号(1) 封装 封装尺寸(2)
MSP430FR2676TPT LQFP (48) 7mm × 7mm
MSP430FR2675TPT LQFP (48) 7mm × 7mm
MSP430FR2676TRHA VQFN (40) 6mm × 6mm
MSP430FR2675TRHA VQFN (40) 6mm × 6mm
MSP430FR2676TRHB VQFN (32) 5mm x 5mm
MSP430FR2675TRHB VQFN (32) 5mm x 5mm
MSP430FR2673TRHB VQFN (32) 5mm x 5mm
MSP430FR2672TRHB VQFN (32) 5mm x 5mm
(1) 要获得最新的产品、封装和订购信息,请参阅Section 12中的封装选项附录,或者访问德州仪器 (TI) 网站 www.ti.com.cn。
(2) 这里显示的尺寸为近似值。要获得包含误差值的封装尺寸,请参阅机械数据(Section 12中)。
警告:

系统级静电放电 (ESD) 保护必须符合器件级 ESD 规范,以防发生电气过载或对数据或代码存储器造成干扰。如需更多信息,请参阅 MSP430 系统级 ESD 注意事项。

4 功能模块图

图 4-1 给出了功能方框图。

GUID-7C23E67C-5081-4B40-8557-64EEF51AE265-low.gif 图 4-1 功能模块图
  • MCU 的主电源对 DVCC 和 DVSS 分别为数字模块和模拟模块供电。推荐的旁路电容和去耦电容分别为 4.7μF 至 10μF 和 0.1μF,精度为 ±5%。
  • VREG 是 CapTIvate 稳压器的去耦电容。所需去耦电容的建议值为 1µF,最大等效串联电阻 (ESR) ≤ 200mΩ。
  • 所有 GPIO 均具备引脚中断功能,可将 MCU 从所有 LPM 模式唤醒。
  • 在 LPM3 或 LPM4 模式下,CapTIvate 模块可以正常工作,而其他外设则会关闭。

5 Revision History

Changes from revision C to revision D

Changes from February 20, 2020 to September 14, 2021

  • 更新了整个文档中的表格、图和交叉参考的编号格式Go
  • 在Section 3 说明 中添加了指向在线配套资料的链接Go
  • Corrected the pin numbers for the Veref+ and Veref- signals in Table 7-2, Signal Descriptions Go
  • Corrected the TAxRMP, USCIA0RMP, USCIB0RMP, and USCIB1RMP bit names in the notes for Table 7-2, Signal Descriptions Go
  • Corrected the USCIA0RMP and USCIBxRMP bit names in Section 9.10.7, Enhanced Universal Serial Communication Interface (eUSCI_A0, eUSCI_B0) Go
  • Corrected the TAxRMP bit name in the notes for Table 9-16, TA2 and TA3 Pin Configurations of Remap Functionality Go
  • Added an inverter to the Schmitt-trigger enable in Figure 9-4, Port Input/Output With Schmitt Trigger Go
  • Corrected the value of the P5SEL.x column for P5.3 and P5.4 in Table 9-27, Port P5 (P5.0 to P5.7) Pin Functions Go
  • Added the SYSCFG3 register to Table 9-35, SYS Registers (Base Address: 0140h) Go

Changes from revision B to revision C

Changes from December 11, 2019 to February 19, 2020

  • 向Section 1 特性 添加了 MSP430FR2673 和 MSP430FR2672Go
  • 向此数据表添加了 MSP430FR2673 和 MSP430FR2672Go
  • 向器件信息(在Section 3 说明 中)添加了 MSP430FR2673 和 MSP430FR2672Go
  • Added MSP430FR2673TRHB and MSP430FR2672TRHB to Table 6-1, Device Comparison Go
  • Added MSP430FR2673TRHB and MSP430FR2672TRHB to Figure 7-3, 32-Pin RHB Package (Top View) Go
  • Added MSP430FR2673 and MSP430FR2672 to Table 9-29, Device IDs Go
  • Added MSP430FR2673 and MSP430FR2672 to Table 9-31, Memory Organization Go
  • Added MSP430FR2673 and MSP430FR2672 in Figure 11-1, Device Nomenclature Go

Changes from revision A to revision B

Changes from April 26, 2019 to December 10, 2019

  • 更新了 Section 1 特性 Go
  • Changed the note that begins "Supply voltage changes faster than 0.2 V/µs can trigger a BOR reset..." in Section 8.3, Recommended Operating Conditions Go
  • Added the note that begins "TI recommends that power to the DVCC pin must not exceed the limits..." in Section 8.3, Recommended Operating Conditions Go
  • Changed the note that begins "A capacitor tolerance of ±20% or better is required..." in Section 8.3, Recommended Operating Conditions Go
  • Added the note "See MSP430 32-kHz Crystal Oscillators for details on crystal section, layout, and testing" to Section 8.12.3.1, XT1 Crystal Oscillator (Low Frequency) Go
  • Changed the note that begins "Requires external capacitors at both terminals..." in Section 8.12.3.1, XT1 Crystal Oscillator (Low Frequency) Go
  • Added the tTA,cap parameter in Section 8.12.6.1, Timer_A Go
  • Added the tTB,cap parameter in Section 8.12.6.2, Timer_B Go
  • Corrected the test conditions for the RI parameter in Section 8.12.8.1, ADC, Power Supply and Input Range Conditions Go
  • Removed ADCDIV from the equations for tCONVERT because ADCCLK is after division in Section 8.12.8.2, ADC, Timing Parameters Go
  • Added the note that begins "tSample = ln(2n+1) × τ ..." in Section 8.12.8.2, ADC, Timing Parameters Go
  • Changed the symbol and description of the DCCAPCLK parameter in Section 8.12.10.1, CapTIvate Electrical Characteristics Go
  • Changed CRC covered end address to 0x1AF7 in table note (1) in Table 9-30 , Device Descriptors Go

Changes from initial release to revision A

Changes from March 12, 2019 to April 25, 2019

  • 将文档状态更改为“量产数据”Go
  • 在图 4-1、功能方框图 中添加了 MSP430FR2673 和 MSP430FR2672 的存储器大小Go
  • Updated Section 8.7 Low-Power Mode (LPM3, LPM4) Supply Currents (Into VCC) Excluding External Current with production values Go
  • Updated Section 8.12.3.2 DCO FLL, Frequency with production valuesGo

6 Device Comparison

Table 6-1 summarizes the features of the available family members.

Table 6-1 Device Comparison
DEVICE(1)(2) PROGRAM FRAM + INFORMATION FRAM (KB) SRAM (KB) TA0, TA1, TA2, TA3 TB0 eUSCI_A0
eUSCI_A1
eUSCI_B0
eUSCI_B1
12-BIT ADC CHANNELS eCOMP CapTIvate TECHNOLOGY CHANNELS GPIOs PACKAGE
MSP430FR2676TPT 64 + 0.5 8 4, 3 × CCR(3) 1, 7 × CCR(4) 2 2 12 1 16 43 48 LQFP (PT)
MSP430FR2675TPT 32 + 0.5 6 4, 3 × CCR(3) 1, 7 × CCR(4) 2 2 12 1 16 43 48 LQFP (PT)
MSP430FR2676TRHA 64 + 0.5 8 4, 3 × CCR(3) 1, 7 × CCR(4) 2 2 10 1 16 35 40 VQFN (RHA)
MSP430FR2675TRHA 32 + 0.5 6 4, 3 × CCR(3) 1, 7 × CCR(4) 2 2 10 1 16 35 40 VQFN (RHA)
MSP430FR2676TRHB 64 + 0.5 8 4, 3 × CCR(3) 1, 7 × CCR(5) 2 2 8 1 16 27 32 VQFN (RHB)
MSP430FR2675TRHB 32 + 0.5 6 4, 3 × CCR(3) 1, 7 × CCR(5) 2 2 8 1 16 27 32 VQFN (RHB)
MSP430FR2673TRHB 16 + 0.5 4 4, 3 × CCR(3) 1, 7 × CCR(5) 2 2 8 1 16 27 32 VQFN (RHB)
MSP430FR2672TRHB 8 + 0.5 2 4, 3 × CCR(3) 1, 7 × CCR(5) 2 2 8 1 16 27 32 VQFN (RHB)
(1) For the most current package and ordering information, see the Package Option Addendum in Section 12, or see the TI website at www.ti.com
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/packaging
(3) A CCR register is a configurable register that provides internal and external capture or compare inputs, or internal and external PWM outputs. TA0 and TA1 are externally connected on CCR1, CCR2. TA2 and TA3 are externally connected on CCR0 to CCR2.
(4) A CCR register is a configurable register that provides internal and external capture or compare inputs, or internal and external PWM outputs. TB0 is externally connected on CCR0 to CCR6.
(5) A CCR register is a configurable register that provides internal capture only, CCR0 to CCR6 registers can only be used for period timing and interrupt generation, NO PWM outputs functionality.

6.1 Related Products

For information about other devices in this family of products or related products, see the following links.

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Products for MSP430 microcontrollers

Our 16-bit MSP430™ microcontrollers (MCUs) provide affordable solutions for all applications. Our leadership in integrated precision analog enables designers to enhance system performance and lower system costs. Designers can find a cost-effective MCU within the broad MSP430 portfolio of over 2000 devices for virtually any need. Get started quickly and reduce time to market with our simplified tools, software, and best-in-class support.

Reference designs for MSP430FR2676

Find reference designs leveraging the best in TI technology – from analog and power management to embedded processors

 

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