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这款面向两线制双向总线 (I2C) 的 16 位 I/O 扩展器设计为在 2.5V 至 5.5V VCC 下运行。
PCF8575 器件通过 I2C 接口 [串行时钟 (SCL)、串行数据 (SDA)] 为大多数微控制器系列提供通用远程 I/O 扩展。
该器件具有一个 16 位准双向输入/输出 (I/O) 端口(P07–P00、P17–P10),其中包括具有高电流驱动能力的锁存输出,用于直接驱动 LED。每个准双向 I/O 都可以用作输入或输出(无需使用数据方向控制信号)。在上电时,这些 I/O 处于高电平。在该模式下,仅有一个连接到 VCC 的电流源处于活动状态。
器件型号 | 封装(1) | 封装尺寸(2) |
---|---|---|
PCF8575 | SSOP(DB,24) | 8.2mm × 7.8mm |
SSOP(DBQ,24) | 8.65mm × 6mm | |
TVSOP(DGV,24) | 5mm × 6.4mm | |
SOIC(DW,24) | 15.5mm × 10.3mm | |
TSSOP(PW,24) | 7.8mm × 6.4mm | |
VQFN(RGV,24) | 4mm × 4mm |
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | DB, DBQ, DGV, DW, AND PW | RGE | ||
A0 | 21 | 18 | I | Address input 0. Connect directly to VCC or ground. Pull-up resistors are not needed. |
A1 | 2 | 23 | I | Address input 1. Connect directly to VCC or ground. Pull-up resistors are not needed. |
A2 | 3 | 24 | I | Address input 2. Connect directly to VCC or ground. Pull-up resistors are not needed. |
INT | 1 | 22 | O | Interrupt output. Connect to VCC through a pull-up resistor. |
P00 | 4 | 1 | I/O | P-port input/output. Push-pull design structure. |
P01 | 5 | 2 | I/O | P-port input/output. Push-pull design structure. |
P02 | 6 | 3 | I/O | P-port input/output. Push-pull design structure. |
P03 | 7 | 4 | I/O | P-port input/output. Push-pull design structure. |
P04 | 8 | 5 | I/O | P-port input/output. Push-pull design structure. |
P05 | 9 | 6 | I/O | P-port input/output. Push-pull design structure. |
P06 | 10 | 7 | I/O | P-port input/output. Push-pull design structure. |
P07 | 11 | 8 | I/O | P-port input/output. Push-pull design structure. |
GND | 12 | 9 | — | Ground |
P10 | 13 | 10 | I/O | P-port input/output. Push-pull design structure. |
P11 | 14 | 11 | I/O | P-port input/output. Push-pull design structure. |
P12 | 15 | 12 | I/O | P-port input/output. Push-pull design structure. |
P13 | 16 | 13 | I/O | P-port input/output. Push-pull design structure. |
P14 | 17 | 14 | I/O | P-port input/output. Push-pull design structure. |
P15 | 18 | 15 | I/O | P-port input/output. Push-pull design structure. |
P16 | 19 | 16 | I/O | P-port input/output. Push-pull design structure. |
P17 | 20 | 17 | I/O | P-port input/output. Push-pull design structure. |
SCL | 22 | 19 | I | Serial clock line. Connect to VCC through a pull-up resistor |
SDA | 23 | 20 | I/O | Serial data line. Connect to VCC through a pull-up resistor. |
VCC | 24 | 21 | — | Supply voltage |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage range | –0.5 | 6.5 | V | |
VI | Input voltage range (2) | –0.5 | VCC + 0.5 | V | |
VO | Output voltage range (2) | –0.5 | VCC + 0.5 | V | |
IIK | Input clamp current | VI < 0 | –20 | mA | |
IOK | Output clamp current | VO < 0 | –20 | mA | |
IOK | Input/output clamp current | VO < 0 or VO > VCC | –20 | mA | |
IOL | Continuous output low current | VO = 0 to VCC | 50 | mA | |
IOH | Continuous output high current | VO = 0 to VCC | –4 | mA | |
Continuous current through VCC or GND | ±100 | mA | |||
Tstg | Storage temperature range | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins | 2000 | V | |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins | 1000 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage | 2.5 | 5.5 | V | |
VIH | High-level input voltage | 0.7 × VCC | VCC + 0.5 | V | |
VIL | Low-level input voltage | –0.5 | 0.3 × VCC | V | |
IOH | P-port high-level output current | –1 | mA | ||
IOHT | P-port transient pullup current | –10 | mA | ||
IOL | P-port low-level output current | 25 | mA | ||
TA | Operating free-air temperature | –40 | 85 | °C |
THERMAL METRIC (1) | PCF8575 | UNIT | |||||||
---|---|---|---|---|---|---|---|---|---|
DB | DBQ | DGV | DW | PW | RGE | ||||
24 PINS | |||||||||
RθJA | Junction-to-ambient thermal resistance | 87.8 | 61 | 86 | 75.6 | 99.7 | 53.6 | °C/W | |
RθJC(top) | Junction-to-case (top) thermal resistance | 51.9 | 47.9 | 42.5 | 50.8 | °C/W | |||
RθJB | Junction-to-board thermal resistance | 56.8 | 50.1 | 66.1 | 31.5 | °C/W | |||
ΨJT | Junction-to-top characterization parameter | 14.3 | 21.1 | 2.7 | 3.4 | °C/W | |||
ΨJB | Junction-to-board characterization parameter | 56.2 | 49.7 | 65.5 | 31.4 | °C/W | |||
RθJC(bot) | Junction-to-case (bottom) thermal resistance | - | - | - | 14.8 | °C/W |
PARAMETER | TEST CONDITIONS | VCC | MIN | TYP(1) | MAX | UNIT | ||
---|---|---|---|---|---|---|---|---|
VIK | Input diode clamp voltage | II = –18 mA | 2.5 V to 5.5 V | –1.2 | V | |||
VPOR | Power-on reset voltage | VI = VCC or GND, IO = 0 | VPOR | 1.2 | 1.8 | V | ||
IOH | P port | VO = GND | 2.5 V to 5.5 V | –30 | –300 | μA | ||
IOHT | P-port transient pullup current | High during ACK, VOH = GND | 2.5 V | –0.5 | –1 | mA | ||
IOL | SDA | VOL = 0.4 V | 2.5 V to 5.5 V | 3 | mA | |||
P port | VOL = 0.4 V | 5 | 15 | |||||
VOL = 1 V | 10 | 25 | ||||||
INT | VOL = 0.4 V | 1.6 | ||||||
II | SCL, SDA | VI = VCC or GND | 2.5 V to 5.5 V | ±5 | μA | |||
A0, A1, A2 | ±1 | |||||||
IIHL | P port | -250mV < Vi < GND | 2.5 V to 5.5 V | ±400 | μA | |||
ICC | Operating mode | VI = VCC or GND, IO = 0, fscl = 400 kHz |
5.5 V | 100 | 200 | μA | ||
3.6 V | 30 | 75 | ||||||
2.7 V | 20 | 50 | ||||||
Standby mode | VI = VCC or GND, IO = 0, fscl = 0 kHz | 5.5 V | 2.5 | 10 | ||||
3.6 V | 2.5 | 10 | ||||||
2.7 V | 2.5 | 10 | ||||||
ΔICC | Supply current increase | One input at VCC – 0.6 V, Other inputs at VCC or GND |
2.5 V to 5.5 V | 200 | μA | |||
CI | SCL | VI = VCC or GND | 2.5 V to 5.5 V | 3 | 7 | pF | ||
Cio | SDA | VIO = VCC or GND | 2.5 V to 5.5 V | 3 | 7 | pF | ||
P port | 4 | 10 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
fscl | I2C clock frequency | 400 | kHz | ||
tsch | I2C clock high time | 0.6 | μs | ||
tscl | I2C clock low time | 1.3 | μs | ||
tsp | I2C spike time | 50 | ns | ||
tsds | I2C serial data setup time | 100 | ns | ||
tsdh | I2C serial data hold time | 0 | ns | ||
ticr | I2C input rise time | 20 + 0.1Cb (1) | 300 | ns | |
ticf | I2C input fall time | 20 + 0.1Cb (1) | 300 | ns | |
tocf | I2C output fall time | 10-pF to 400-pF bus | 300 | ns | |
tbuf | I2C bus free time between Stop and Start | 1.3 | μs | ||
tsts | I2C start or repeated Start condition setup | 0.6 | μs | ||
tsth | I2C start or repeated Start condition hold | 0.6 | μs | ||
tsps | I2C Stop condition setup | 0.6 | μs | ||
tvd | Valid-data time | SCL low to SDA output valid | 1.2 | μs | |
Cb | I2C bus capacitive load | 400 | pF |
PARAMETER | FROM (INPUT) |
TO (OUTPUT) |
MIN | MAX | UNIT | |
---|---|---|---|---|---|---|
tiv | Interrupt valid time | P port | INT | 4 | μs | |
tir | Interrupt reset delay time | SCL | INT | 4 | μs | |
tpv | Output data valid | SCL | P port | 4 | μs | |
tsu | Input data setup time | P port | SCL | 0 | μs | |
th | Input data hold time | P port | SCL | 4 | μs |