SimpleLink™ CC1352P 器件是一款多协议、多频带 Sub-1GHz 和 2.4GHz 无线微控制器 (MCU),支持 Thread、Zigbee®、低功耗 Bluetooth® 5.2、IEEE 802.15.4g、支持 IPv6 的智能对象 (6LoWPAN)、MIOTY®、Wi-SUN®、专有系统(包括 Sub-1GHz 和 2.4GHz 的 TI 15.4-Stack)和通过动态多协议管理器 (DMM) 驱动程序实现的并发多协议。该器件经过优化,可用于楼宇安防系统、HVAC、智能仪表、医疗、有线网络、便携式电子产品、家庭影院和娱乐以及联网外设市场中的低功耗无线通信和高级检测。该器件的突出特性包括:
CC1352P 器件是 SimpleLink™ MCU 平台的一部分,该平台包括 Wi-Fi®、低功耗蓝牙、Thread、Zigbee、Sub-1GHz MCU 和主机 MCU,它们共用一个通用、易于使用的开发环境,其中包含单核软件开发套件 (SDK) 和丰富的工具集。借助一次性集成的 SimpleLink™ 平台,可以将产品组合中的任何器件组合添加至您的设计中,从而在设计要求变更时实现 100% 的代码重用。如需更多信息,请访问 SimpleLink™ MCU 平台。
器件型号(1) | 封装 | 封装尺寸(标称值) |
---|---|---|
CC1352P1F3RGZ | VQFN (48) | 7.00mm × 7.00mm |
All Revision History Changes Intro HTMLNovember 24, 2020 to February 12, 2021 (from RevisionE (November 2020)to RevisionF (February 2021))
DEVICE | RADIO SUPPORT | FLASH (KB) |
RAM (KB) |
GPIO | PACKAGE SIZE |
---|---|---|---|---|---|
CC1312R | Sub-1 GHz | 352 | 80 | 30 | RGZ (7-mm × 7-mm VQFN48) |
CC1352P | Multiprotocol Sub-1 GHz Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats +20-dBm high-power amplifier |
352 | 80 | 26 | RGZ (7-mm × 7-mm VQFN48) |
CC1352R | Multiprotocol Sub-1 GHz Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats |
352 | 80 | 28 | RGZ (7-mm × 7-mm VQFN48) |
CC2642R | Bluetooth
5.2 Low Energy 2.4 GHz proprietary FSK-based formats |
352 | 80 | 31 | RGZ (7-mm × 7-mm VQFN48) |
CC2642R-Q1 | Bluetooth 5.2 Low Energy | 352 | 80 | 31 | RTC (7-mm × 7-mm VQFN48) |
CC2652R | Multiprotocol Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats |
352 | 80 | 31 | RGZ (7-mm × 7-mm VQFN48) |
CC2652RB | Multiprotocol Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats |
352 | 80 | 31 | RGZ (7-mm × 7-mm VQFN48) |
CC2652P | Multiprotocol Bluetooth 5.2 Low Energy Zigbee Thread 2.4 GHz proprietary FSK-based formats +19.5-dBm high-power amplifier |
352 | 80 | 26 | RGZ (7-mm × 7-mm VQFN48) |
CC1310 | Sub-1 GHz | 32–128 | 16–20 | 10–31 | RGZ (7-mm × 7-mm VQFN48) RHB (5-mm × 5-mm VQFN32) RSM (4-mm × 4-mm VQFN32) |
CC1350 | Sub-1 GHz Bluetooth 4.2 Low Energy |
128 | 20 | 10–31 | RGZ (7-mm × 7-mm VQFN48) RHB (5-mm × 5-mm VQFN32) RSM (4-mm × 4-mm VQFN32) |
CC2640R2F | Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats |
128 | 20 | 10–31 | RGZ (7-mm × 7-mm VQFN48) RHB (5-mm × 5-mm VQFN32) RSM (4-mm × 4-mm VQFN32) YFV (2.7-mm × 2.7-mm DSBGA34) |
CC2640R2F-Q1 | Bluetooth 5.1 Low Energy 2.4 GHz proprietary FSK-based formats |
128 | 20 | 31 | RGZ (7-mm × 7-mm VQFN48) |
The following I/O pins marked in #SWRS1929884 in bold have high-drive capabilities:
The following I/O pins marked in #SWRS1929884 in italics have analog capabilities:
PIN | I/O | TYPE | DESCRIPTION | |
---|---|---|---|---|
NAME | NO. | |||
DCDC_SW | 33 | — | Power | Output from internal DC/DC converter(1) |
DCOUPL | 23 | — | Power | For decoupling of internal 1.27 V regulated digital-supply (2) |
DIO_5 | 10 | I/O | Digital | GPIO, high-drive capability |
DIO_6 | 11 | I/O | Digital | GPIO, high-drive capability |
DIO_7 | 12 | I/O | Digital | GPIO, high-drive capability |
DIO_8 | 14 | I/O | Digital | GPIO |
DIO_9 | 15 | I/O | Digital | GPIO |
DIO_10 | 16 | I/O | Digital | GPIO |
DIO_11 | 17 | I/O | Digital | GPIO |
DIO_12 | 18 | I/O | Digital | GPIO |
DIO_13 | 19 | I/O | Digital | GPIO |
DIO_14 | 20 | I/O | Digital | GPIO |
DIO_15 | 21 | I/O | Digital | GPIO |
DIO_16 | 26 | I/O | Digital | GPIO, JTAG_TDO, high-drive capability |
DIO_17 | 27 | I/O | Digital | GPIO, JTAG_TDI, high-drive capability |
DIO_18 | 28 | I/O | Digital | GPIO |
DIO_19 | 29 | I/O | Digital | GPIO |
DIO_20 | 30 | I/O | Digital | GPIO |
DIO_21 | 31 | I/O | Digital | GPIO |
DIO_22 | 32 | I/O | Digital | GPIO |
DIO_23 | 36 | I/O | Digital or Analog | GPIO, analog capability |
DIO_24 | 37 | I/O | Digital or Analog | GPIO, analog capability |
DIO_25 | 38 | I/O | Digital or Analog | GPIO, analog capability |
DIO_26 | 39 | I/O | Digital or Analog | GPIO, analog capability |
DIO_27 | 40 | I/O | Digital or Analog | GPIO, analog capability |
DIO_28 | 41 | I/O | Digital or Analog | GPIO, analog capability |
DIO_29 | 42 | I/O | Digital or Analog | GPIO, analog capability |
DIO_30 | 43 | I/O | Digital or Analog | GPIO, analog capability |
EGP | — | — | GND | Ground – exposed ground pad(3) |
JTAG_TMSC | 24 | I/O | Digital | JTAG TMSC, high-drive capability |
JTAG_TCKC | 25 | I | Digital | JTAG TCKC |
RESET_N | 35 | I | Digital | Reset, active low. No internal pullup resistor |
RF_P_2_4GHZ | 1 | — | RF | Positive 2.4-GHz RF input signal to LNA during RX Positive 2.4-GHz RF output signal from PA during TX |
RF_N_2_4GHZ | 2 | — | RF | Negative 2.4-GHz RF input signal to LNA during RX Negative 2.4-GHz RF output signal from PA during TX |
RF_P_SUB_1GHZ | 3 | — | RF | Positive Sub-1 GHz RF input signal to LNA during RX Positive Sub-1 GHz RF output signal from PA during TX |
RF_N_SUB_1GHZ | 4 | — | RF | Negative Sub-1 GHz RF input signal to LNA during RX Negative Sub-1 GHz RF output signal from PA during TX |
RX_TX | 7 | — | RF | Optional bias pin for the RF LNA |
TX_20DBM_P | 5 | — | RF | Positive Sub-1 GHz or 2.4-GHz high-power TX signal |
TX_20DBM_N | 6 | — | RF | Negative Sub-1 GHz or 2.4-GHz high-power TX signal |
VDDR | 45 | — | Power | Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2)(4)(6) |
VDDR_RF | 48 | — | Power | Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2)(5)(6) |
VDDS | 44 | — | Power | 1.8-V to 3.8-V main chip supply(1) |
VDDS2 | 13 | — | Power | 1.8-V to 3.8-V DIO supply(1) |
VDDS3 | 22 | — | Power | 1.8-V to 3.8-V DIO supply(1) |
VDDS_DCDC | 34 | — | Power | 1.8-V to 3.8-V DC/DC converter supply |
X48M_N | 46 | — | Analog | 48-MHz crystal oscillator pin 1 |
X48M_P | 47 | — | Analog | 48-MHz crystal oscillator pin 2 |
X32K_Q1 | 8 | — | Analog | 32-kHz crystal oscillator pin 1 |
X32K_Q2 | 9 | — | Analog | 32-kHz crystal oscillator pin 2 |
FUNCTION | SIGNAL NAME | PIN NUMBER | ACCEPTABLE PRACTICE(1) | PREFERRED PRACTICE(1) |
---|---|---|---|---|
GPIO | DIO_n |
10–12 14–21 26–32 36–43 |
NC or GND | NC |
32.768-kHz crystal | X32K_Q1 | 8 | NC or GND | NC |
X32K_Q2 | 9 | |||
DC/DC converter(2) | DCDC_SW | 33 | NC | NC |
VDDS_DCDC | 34 | VDDS | VDDS |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VDDS(3) | Supply voltage | –0.3 | 4.1 | V | |
Voltage on any digital pin(4) | –0.3 | VDDS + 0.3, max 4.1 | V | ||
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X48M_N and X48M_P | –0.3 | VDDR + 0.3, max 2.25 | V | ||
Vin | Voltage on ADC input | Voltage scaling enabled | –0.3 | VDDS | V |
Voltage scaling disabled, internal reference | –0.3 | 1.49 | |||
Voltage scaling disabled, VDDS as reference | –0.3 | VDDS / 2.9 | |||
Input level, Sub-1 GHz RF pins | 10 | dBm | |||
Input level, 2.4 GHz RF pins | 5 | dBm | |||
Tstg | Storage temperature | –40 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
VESD | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1) | All pins | ±2000 | V |
Charged device model (CDM), per JESD22-C101(2) | All pins | ±500 | V |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Operating ambient temperature | –40 | 85 | °C | |
Operating supply voltage (VDDS) | 1.8 | 3.8 | V | |
Operating supply voltage (VDDS), boost mode |
VDDR = 1.95 V +14 dBm RF output sub-1 GHz power amplifier |
2.1 | 3.8 | V |
Rising supply voltage slew rate | 0 | 100 | mV/µs | |
Falling supply voltage slew rate(1) | 0 | 20 | mV/µs |
PARAMETER | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|
VDDS Power-on-Reset (POR) threshold | 1.1 - 1.55 | V | |||
VDDS Brown-out Detector (BOD) (1) | Rising threshold | 1.77 | V | ||
VDDS Brown-out Detector (BOD), before initial boot (2) | Rising threshold | 1.70 | V | ||
VDDS Brown-out Detector (BOD) (1) | Falling threshold | 1.75 | V |
PARAMETER | TEST CONDITIONS | TYP | UNIT | |
---|---|---|---|---|
Core Current Consumption | ||||
Icore | Reset and Shutdown | Reset. RESET_N pin asserted or VDDS below power-on-reset threshold | 150 | nA |
Shutdown. No clocks running, no retention | 150 | |||
Standby without cache retention |
RTC running, CPU, 80KB RAM and (partial) register retention. RCOSC_LF |
0.85 | µA | |
RTC running, CPU, 80KB RAM and (partial) register retention XOSC_LF |
0.99 | µA | ||
Standby with cache retention |
RTC running, CPU, 80KB RAM and (partial) register retention. RCOSC_LF |
2.78 | µA | |
RTC running, CPU, 80KB RAM and (partial) register retention. XOSC_LF |
2.92 | µA | ||
Idle | Supply Systems and RAM powered RCOSC_HF |
590 | µA | |
Active | MCU running CoreMark at 48 MHz RCOSC_HF |
2.89 | mA | |
Peripheral Current Consumption 1, 2 | ||||
Iperi | Peripheral power domain | Delta current with domain enabled | 82.3 | µA |
Serial power domain | Delta current with domain enabled | 5.5 | ||
RF Core | Delta current with power domain enabled, clock enabled, RF core idle |
178.9 | ||
µDMA | Delta current with clock enabled, module is idle | 53.6 | ||
Timers | Delta current with clock enabled, module is idle(5) | 67.8 | ||
I2C | Delta current with clock enabled, module is idle | 8.2 | ||
I2S | Delta current with clock enabled, module is idle | 21.7 | ||
SSI | Delta current with clock enabled, module is idle(4) | 69.4 | ||
UART | Delta current with clock enabled, module is idle(3) | 140.8 | ||
CRYPTO (AES) | Delta current with clock enabled, module is idle | 21.1 | ||
PKA | Delta current with clock enabled, module is idle | 71.1 | ||
TRNG | Delta current with clock enabled, module is idle | 29.7 | ||
Sensor Controller Engine Consumption | ||||
ISCE | Active mode | 24 MHz, infinite loop, VDDS = 3.0 V | 808.5 | µA |
Low-power mode | 2 MHz, infinite loop, VDDS = 3.0 V | 30.1 |
PARAMETER | TEST CONDITIONS | TYP | UNIT | |
---|---|---|---|---|
Radio receive current, 868 MHz | 5.8 | mA | ||
Radio receive current, 2.44 GHz (BLE) | VDDS = 3.0 V | 6.9 | mA | |
Radio transmit current Sub-1 GHz PA |
0 dBm output power setting 868 MHz |
8.0 | mA | |
+10 dBm output power setting 868 MHz |
14.3 | mA | ||
Radio transmit current Boost mode, Sub-1 GHz PA |
+14 dBm output power setting 868 MHz |
24.9 | mA | |
Radio transmit current 2.4 GHz PA (BLE) |
0 dBm output power setting, VDDS = 3.0 V | 7.1 | mA | |
Radio transmit current 2.4 GHz PA (BLE) |
+5 dBm output power setting 2440 MHz, VDDS = 3.0 V |
9.6 | mA | |
Radio transmit current High-power PA |
Transmit (TX), +20 dBm output power setting 915 MHz, VDDS = 3.3 V |
63 | mA | |
Radio transmit current High-power PA(1) |
Transmit (TX), +20 dBm output power setting 2440 MHz (BLE), VDDS = 3.0 V |
85 | mA | |
Radio transmit current High-power PA, 10 dBm configuration(2) |
Transmit (TX), +10 dBm output power setting 2440 MHz (BLE), VDDS = 3.0 V |
22 | mA |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Flash sector size | 8 | KB | |||
Supported flash erase cycles before failure, full bank(1) (5) | 30 | k Cycles | |||
Supported flash erase cycles before failure, single sector(2) | 60 | k Cycles | |||
Maximum number of write operations per row before sector erase(3) | 83 | Write Operations | |||
Flash retention | 85 °C | 11.4 | Years at 85 °C | ||
Flash sector erase current | Average delta current | 10.7 | mA | ||
Flash sector erase time(4) | Zero cycles | 10 | ms | ||
Flash write current | Average delta current, 4 bytes at a time | 6.2 | mA | ||
Flash write time(4) | 4 bytes at a time | 21.6 | µs |