DATA SHEET
具有使能功能的 TPS3431标准可编程监视器计时器
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1 特性
- 出厂编程的精密看门狗计时器：
- 可在 25°C 条件下实现 ±2.5%（典型值）的看门狗超时 (WDT) 精度
- 看门狗禁用功能
- 用户可编程看门狗超时
- 输入电压范围：VDD = 1.8V 至 6.5V
- 低静态电流：IDD = 10µA（典型值）
- 低电平有效的开漏输出
- 使能输入 (EN) 和使能输出 (ENOUT)
- 采用小型 3mm × 3mm 8 引脚 VSON 封装
- 工作结温范围：
–40°C 至 +125°C
3 说明
TPS3431 是一款具有使能功能的标准可编程看门狗计时器，适用于各种应用。看门狗超时可在 –40°C 至 +125°C 温度范围内实现 15% 的高计时精度，在 25°C 下实现 2.5% 的典型计时精度，并且可通过外部电容器或工厂编程的默认延迟设置进行编程。在开发过程中，可以通过 Enable 引脚或 SET 逻辑引脚将看门狗禁用，从而避免出现不必要的看门狗超时。
TPS3431 采用小型 3.00mm ×
3.00mm 8 引脚 VSON 封装。
器件信息(1)
| 器件型号 | 封装 | 封装尺寸（标称值） |
|---|---|---|
| TPS3431 | VSON (8) | 3.00mm × 3.00mm |
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
也可以将 EN 保持浮动并将其从内部上拉至 VDD
也可以将 ENOUT 保持浮动或将其连接至 WDO
标准看门狗计时器电路
标准化看门狗超时 (tWD) 精度（SET1 = 1，CWD = NC）4 Revision History
Changes from Revision * (July 2018) to Revision A (June 2021)
- 删除了“可在工作温度范围内实现 ±15% 的看门狗超时和看门狗复位延迟精度”Go
- 使用网络链接更新了“应用”部分Go
- 删除了“–40°C 至 +125°C 温度范围内实现 15% 的计时精度，”Go
- Updated ESD RatingsGo
- Updated ICWD min and max specGo
- Updated VCWD min and max specGo
- Added a footnote to for tINIT Go
- Updated tWDU min and max boundry values from 0.85 and 1.15 to 0.905 and 1.095 respectivelyGo
- Updated tWDU min and max values for all capacitorsGo
- Updated the equations 3 and 4 with tWD min and max boundry values from 0.85 and 1.15 to 0.905 and 1.095 respectivelyGo
5 Pin Configuration and Functions
EN can also be left floating and is internally pulled-up to VDD
ENOUT can also be left floating or tied to
WDO
Figure 5-1 DRB Package:
TPS34313-mm × 3-mm VSON-8
Top View
Table 5-1 Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| VDD | 1 | I | Supply voltage pin. For noisy systems, connecting a 0.1-μF bypass capacitor is recommended. |
| CWD | 2 | I | Programmable watchdog timeout input. The
watchdog timeout is set by connecting a capacitor between this pin and
ground. Connecting via a 10-kΩ resistor to VDD or leaving
unconnected further enables the selection of the preset watchdog
timeouts; see the CWD Functionality section. TheTPS3431 determines the watchdog timeout using Equation 1 |
| EN | 3 | I | Enable input pin. This pin is internally pulled up to VDD and must be logic high or left floating. When EN goes logic low, ENOUT goes logic low and WDI is ignored and WDO remains logic high. When EN goes logic high, ENOUT goes high (asserts) after the watchdog reset delay time (tRST). This pin can also be driven with an external push-button, transistor, or microcontroller. |
| GND | 4 | — | Ground pin |
| SET1 | 5 | I | Logic input. Grounding the SET1 pin disables the watchdog timer. SET1 and CWD select the watchdog timeouts; see the SET1 section. |
| WDI | 6 | I | Watchdog input. A falling
edge must occur at WDI before the timeout (tWD) expires. When the watchdog is not in use, the SET1 pin can be used to disable the watchdog. WDI is ignored when WDO is low (asserted) and when the watchdog is disabled. If the watchdog is disabled, WDI cannot be left unconnected and must be driven to either VDD or GND. |
| WDO | 7 | O | Watchdog open-drain active-low output. Connect WDO with a 1-kΩ to 100-kΩ resistor to the correct pull-up voltage rail (VPU). WDO goes low (asserts) when a watchdog timeout occurs. When a watchdog timeout occurs, WDO goes low (asserts) for the watchdog reset delay time (tRST). When EN goes low, WDO is in a high-impedance state and will be pulled to logic high. |
| ENOUT | 8 | O | Enable open-drain active-high output. Connect ENOUT with a 1-kΩ to 100-kΩ resistor to the correct pull-up voltage rail (VPU). When EN goes logic high, ENOUT goes high impedance and pulls logic high (asserts) due to the external pull-up resistor after the watchdog reset delay time (tRST). When EN is forced logic low, ENOUT goes low after 200 ns and remains logic low as long as EN is logic low. |
| Thermal pad | — | Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND. | |
