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  • AMC1302 精密、±50mV 输入、增强型隔离放大器

    • ZHCSIF3D June   2018  – June 2021 AMC1302

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  • AMC1302 精密、±50mV 输入、增强型隔离放大器
  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specification
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Shunt Resistor Sizing
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 术语表
  12. 12Mechanical, Packaging, and Orderable Information
  13. 重要声明
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DATA SHEET

AMC1302 精密、±50mV 输入、增强型隔离放大器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • ±50mV 输入电压范围，针对基于分流器的电流测量进行了优化
  • 固定增益：41
  • 低直流误差：
    • 失调电压误差：±50µV（最大值）
    • 温漂：±0.8µV/°C（最大值）
    • 增益误差：±0.2%（最大值）
    • 增益漂移：±35ppm/°C（最大值）
    • 非线性度：0.03%（最大值）
  • 高侧和低侧以 3.3V 或 5V 电压运行
  • 失效防护输出
  • 高 CMTI：100kV/µs（最小值）
  • 低 EMI，符合 CISPR-11 和 CISPR-25 标准
  • 安全相关认证：
    • 7071-VPK 增强型隔离，符合 DIN VDE V 0884-11：2017-01
    • 符合 UL1577 标准且长达 1 分钟的 5000VRMS 隔离
  • 可在工业级工作温度范围内正常工作：–40°C 至 +125°C

2 应用

  • 可用于以下应用的隔离式电流感应：
    • 保护继电器
    • 电机驱动器
    • 电源
    • 光电逆变器

3 说明

AMC1302 是一款隔离式精密放大器，此放大器的输出与输入电路由抗电磁干扰性能极强的隔离层隔开。该隔离栅经认证可提供高达 5kVRMS 的增强型电隔离，符合 VDE V 0884-11 和 UL1577 标准，并且可支持最高 1.5kVRMS 的工作电压。

该隔离栅可将系统中以不同共模电压电平运行的各器件隔开，并保护电压较低的器件免受高电压冲击。

AMC1302 的输入针对直接连接低阻抗分流电阻器或其他具有低信号电平的低阻抗电压源的情况进行了优化。出色的直流精度和低温漂支持在 –40°C 至 +125°C 的工业级工作温度范围内，在 PFC 级、直流/直流转换器、交流电机和伺服驱动器中进行精确的电流控制。

集成的无分流器和无高侧电源检测功能可简化系统级设计和诊断。

器件信息(1)
器件型号 封装 封装尺寸（标称值）
AMC1302 SOIC (8) 5.85mm × 7.50mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
典型应用

4 Revision History

Changes from Revision C (October 2019) to Revision D (June 2021)

  • 更新了整个文档中的表格、图和交叉参考的编号格式 Go
  • Changed CIO from ~1 pF to ~1.5 pFGo
  • Changed VOS from –100 µV / ±10 µV / 100 µV to –50 µV / ±2.5 µV / 50 µV (min / typ / max )Go
  • Changed EG from –0.3% / ±0.05% / 0.3%  to –0.2% / ±0.04% / 0.2% (min / typ / max) Go
  • Changed TCEG from –50 ppm/℃ / ±15 ppm/℃ / 50 ppm/℃ to –35 ppm/℃ / ±3 ppm/℃ / 35 ppm/℃ (min / typ / max) Go
  • Changed VFailsafe from –2.6 V / –2.5 V (typ / max) to –2.63 V / –2.57 V / –2.53 V (min / typ / max)Go
  • Changed CMTI from 55 kV/µs / 80 kV/µs to 100 kV/µs / 150 kV/µs (min / typ) Go
  • Changed VDD1POR from 1.75 V / 2.15 V / 2.7 V to 2.4 V / 2.6 V / 2.8 V (min / typ / max)Go
  • Changed Rise, Fall, and Delay Time Waveforms imageGo

Changes from Revision B (November 2018) to Revision C (October 2019)

  • 将安全相关认证 特性项目符号中的 VDE 认证从“DIN V VDE V 0884-11 (VDE V 0884-11)”更改为 DIN VDE V 0884-11 Go

5 Pin Configuration and Functions

Figure 5-1 DWV Package,8-Pin SOIC,Top View
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NO.NAME
1VDD1High-side powerHigh-side power supply.(1)
2INPAnalog inputNoninverting analog input. Either INP or INN must have a DC current path to GND1 to define the common-mode input voltage.(2)
3INNAnalog inputInverting analog input. Either INP or INN must have a DC current path to GND1 to define the common-mode input voltage.(2)
4GND1High-side groundHigh-side analog ground.
5GND2Low-side groundLow-side analog ground.
6OUTNAnalog outputInverting analog output.
7OUTPAnalog outputNoninverting analog output.
8VDD2Low-side powerLow-side power supply.(1)
(1) See the Section 9 section for power-supply decoupling recommendations.
(2) See the Section 10 section for details.

6 Specifications

6.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Power-supply voltage High-side VDD1 to GND1 –0.3 6.5 V
Low-side VDD2 to GND2 –0.3 6.5 V
Analog input voltage INP, INN GND1 – 6 VDD1 + 0.5 V
Output voltage OUTP, OUTN GND2 – 0.5 VDD2 + 0.5 V
Input current Continuous, any pin except power-supply pins –10 10 mA
Temperature Junction, TJ 150 °C
Storage, Tstg –65 150
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions . If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 V
Charged device model (CDM), per JESD22-C101 (2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)
MIN NOM MAX UNIT
POWER SUPPLY
High-side power supply VDD1 to GND1 3 5 5.5 V
Low-side power supply VDD2 to GND2 3 3.3 5.5 V
ANALOG INPUT
VClipping Differential input voltage before clipping output VIN = VINP – VINN ±64 mV
VFSR Specified linear differential full-scale voltage VIN = VINP – VINN –50 50 mV
VCM Operating common-mode input voltage (VINP + VINN) / 2 to GND1 –0.032               VDD1 – 2.2 V
TEMPERATURE RANGE
TA Specified ambient temperature –55 125 °C

6.4 Thermal Information

THERMAL METRIC(1) AMC1302

UNIT
DWV (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance 85.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 26.8 °C/W
RθJB Junction-to-board thermal resistance 43.5 °C/W
ψJT Junction-to-top characterization parameter 4.8 °C/W
ψJB Junction-to-board characterization parameter 41.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Power Ratings

PARAMETER TEST CONDITIONS VALUE UNIT
PD Maximum power dissipation (both sides) VDD1 = VDD2 = 5.5 V 99 mW
PD1 Maximum power dissipation (high-side) VDD1 = 3.6 V 31 mW
VDD1 = 5.5 V 54
PD2 Maximum power dissipation (low-side) VDD2 = 3.6 V 26 mW
VDD2 = 5.5 V 45

6.6 Insulation Specification

over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VALUE UNIT
GENERAL
CLR External clearance(1) Shortest terminal-to-terminal distance through air ≥ 8.5 mm
CPG External creepage(1) Shortest terminal-to-terminal distance across the package surface ≥ 8.5 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) of the double isolation (2 x 0.0105 mm) ≥ 0.021 mm
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 ≥ 600 V
Material group According to IEC 60664-1 I
Overvoltage category Rated mains voltage ≤ 600 VRMS I -IV
Rated mains voltage ≤ 1000 VRMS I-III
DIN V VDE 0884-11 (VDE V 0884-11): 2017-01(2)
VIORM Maximum repetitive peak isolation voltage AC voltage 2121 VPK
VIOWM Maximum isolation working voltage AC voltage (sine wave) 1500 VRMS
DC voltage 2121 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification test) 7071 VPK
VTEST = VIOTM, t = 1 s (100% production test) 8485 VPK
VIOSM Maximum surge isolation voltage(1) Test method per IEC 60065, 1.2/50 µs waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) 8000 VPK
qpd Apparent charge(3) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM = 2545 VPK, tm = 10 s ≤ 5 pC
Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 × VIORM = 3394 VPK, tm = 10 s ≤ 5
Method b1: At routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s; Vpd(m) = 1.875 × VIORM = 3977 VPK, tm = 1 s ≤ 5
CIO Barrier capacitance, input to output(4) VIO = 0.4 × sin (2 πft), f = 1 MHz ~1.5 pF
RIO Insulation resistance, input to output(4) VIO = 500 V,  TA = 25°C > 1012 Ω
VIO = 500 V,  100°C ≤ TA ≤ 125°C > 1011
VIO = 500 V at  TS = 150°C > 109
Pollution degree 2
Climatic category 55/125/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO = 5000 VRMS, t = 60 s (qualification), VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production) 5000 VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed-circuit board are used to help increase these specifications.
(2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Apparent charge is electrical discharge caused by a partial discharge (pd).
(4) All pins on each side of the barrier tied together creating a two-pin device.

 
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