ZHCSHV7C October 2018 – July 2024 LP5018 , LP5024
PRODUCTION DATA
| PARAMETER | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|
| ƒOSC | Internal oscillator frequency | 15 | MHz | ||
| tPSM | Power save mode deglitch time | 20 | 30 | 40 | ms |
| tEN_H | EN first rising edge until first I2C access | 500 | µs | ||
| tEN_L | EN first falling edge until first I2C reset | 3 | µs | ||
| ƒSCL | I2C clock frequency | 400 | kHz | ||
| 1 | Hold time (repeated) START condition | 0.6 | µs | ||
| 2 | Clock low time | 1.3 | µs | ||
| 3 | Clock high time | 600 | ns | ||
| 4 | Setup time for a repeated START condition | 600 | ns | ||
| 5 | Data hold time | 0 | ns | ||
| 6 | Data setup time | 100 | ns | ||
| 7 | Rise time of SDA and SCL | 20 + 0.1 Cb | 300 | ns | |
| 8 | Fall time of SDA and SCL | 15 + 0.1 Cb | 300 | ns | |
| 9 | Setup time for STOP condition | 600 | ns | ||
| 10 | Bus free time between a STOP and a START condition | 1.3 | µs | ||
| Cb | Capacitive load parameter for each bus line Load of 1 pF corresponds to one nanosecond. | 10 | 200 | pF | |
Figure 6-1 I2C Timing
Parameters