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  • LMR33630 SIMPLE SWITCHER® 3.8V 至 36V、3A 同步降压转换器

    • ZHCSHQ3F August   2017  – November 2020 LMR33630

      PRODUCTION DATA  

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  • LMR33630 SIMPLE SWITCHER® 3.8V 至 36V、3A 同步降压转换器
  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 System Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-Good Flag Output
      2. 8.3.2 Enable and Start-up
      3. 8.3.3 Current Limit and Short Circuit
      4. 8.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto Mode
      2. 8.4.2 Dropout
      3. 8.4.3 Minimum Switch On-Time
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Choosing the Switching Frequency
        3. 9.2.2.3  Setting the Output Voltage
        4. 9.2.2.4  Inductor Selection
        5. 9.2.2.5  Output Capacitor Selection
        6. 9.2.2.6  Input Capacitor Selection
        7. 9.2.2.7  CBOOT
        8. 9.2.2.8  VCC
        9. 9.2.2.9  CFF Selection
        10. 9.2.2.10 External UVLO
        11. 9.2.2.11 Maximum Ambient Temperature
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Ground and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 静电放电警告
    7. 11.7 术语表
  12. 重要声明
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DATA SHEET

LMR33630 SIMPLE SWITCHER® 3.8V 至 36V、3A 同步降压转换器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 提供功能安全
    • 可帮助进行功能安全系统设计的文档
  • 专用于条件严苛的工业应用
    • 输入电压范围：3.8V 至 36V
    • 输出电压范围：1V 至 24V
    • 输出电流：3A
    • 75mΩ/50mΩ RDS-ON 功率 MOSFET
    • 峰值电流模式控制
    • 最短导通时间很短，只有 68ns
    • 频率：400kHz、1.4MHz、2.1MHz
    • 结温范围为 –40°C 至 +125°C
    • 低 EMI 和低开关噪声
    • 集成补偿网络
  • 低 EMI 和开关噪声
    • HotRod™ 封装
    • 并行输入电流路径
  • 可在所有负载下进行高效电源转换
    • 峰值效率 > 95%
    • 低至 25µA 的工作静态电流
  • 灵活的系统接口
    • 电源正常状态标志和精密使能端
  • 使用 TPSM53603 模块缩短产品上市时间
  • 使用 LMR33630 并借助 WEBENCH® Power Designer 创建定制设计方案

2 应用

  • 电机驱动系统：无人机、交流逆变器、
    变频驱动器、伺服系统
  • 工厂和楼宇自动化系统：
    PLC CPU、HVAC 控制、电梯控制
  • 通用宽输入电压电源

3 说明

LMR33630 SIMPLE SWITCHER® 稳压器是一款简单易用的同步降压直流/直流转换器，可提供出色的效率，适用于条件严苛的工业应用。LMR33630 能够使用高达 36V 的输入电压驱动高达 3A 的负载电流，还以超小的解决方案尺寸提供出色的轻负载效率和输出精度。电源正常状态标志和精密使能端等特性有助于实现灵活而又易用的解决方案，适用于广泛的应用。LMR33630 在轻负载条件下自动折返频率以提高效率。此器件通过集成技术省去了大部分外部元件，并提供专为实现简单 PCB 布局而设计的引脚排列方式。保护特性包括热关断、输入欠压锁定、逐周期电流限制和断续短路保护。LMR33630 采用 8 引脚 HSOIC 封装和具有可湿性侧面的 12 引脚 3mm × 2mm 新一代 VQFN 封装。该器件还具有符合 AEC-Q100 标准的版本。

器件信息
器件型号 封装(1) 封装尺寸（标称值）
LMR33630 HSOIC (8) 5.00mm × 4.00mm
LMR33630 VQFN (12) 3.00mm × 2.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。
GUID-492FA7F2-C39A-4AE7-9AB6-96759E13971C-low.gif简化版原理图
GUID-BAD8BDCE-83CF-413D-AE99-C1838CD0D1F2-low.png效率与输出电流间的关系 VOUT = 5V，400kHz，VQFN

4 Revision History

Changes from Revision E (May 2020) to Revision F (November 2020)

  • 向特性 添加了功能安全项目Go
  • 更新了整个文档的表、图和交叉参考的编号格式。Go
  • Added RNX pinout drawingGo
  • Added VQFN package drawingGo

Changes from Revision D (March 2019) to Revision E (May 2020)

  • 添加了指向 TPSM53603 产品页面的链接Go

Changes from Revision C (June 2018) to Revision D (March 2019)

  • Changed heading to device option Go
  • Changed Minimum peak current to reflect ATE data.Go
  • Changed zero cross to reflect ATE data.Go
  • Changed to new current limit equationGo
  • Added new de-rate curveGo

Changes from Revision B (April 2018) to Revision C (June 2018)

  • Changed heading to device option Go
  • Added graphs for Typical Switching Frequency in Dropout Mode Go

Changes from Revision A (February 2018) to Revision B (April 2018)

  • 在整个数据表中添加了 WSON 信息Go
  • Changed block diagram to fix drawing errorGo
  • Added RNX package drawings Go

Changes from Revision * (August 2017) to Revision A (February 2018)

  • 首次发布量产数据数据表Go

5 Device Comparison Table

DEVICE OPTION PACKAGE FREQUENCY RATED CURRENT OUTPUT VOLTAGE
LMR33630ADDA DDA (8-pin HSOIC)
5 × 4 mm		 400 kHz 3 A Adjustable
LMR33630BDDA 1400 kHz 3 A
LMR33630CDDA 2100 kHz 3 A
LMR33630ARNX RNX (12-pin VQFN)
3 × 2 × 0.85 mm		 400 kHz 3 A Adjustable
LMR33630BRNX 1400 kHz 3 A
LMR33630CRNX 2100 kHz 3 A

6 Pin Configuration and Functions

GUID-42F5E693-63C1-4EE1-85CC-208D8519F85F-low.svgFigure 6-1 DDA Package8-Pin HSOIC With PowerPAD™Top View
GUID-0E02D1BA-E3C2-46B7-9AD2-CA62652B85EF-low.svgFigure 6-2 RNX Package12-Pin VQFNTop View
Table 6-1 Pin Functions
PIN TYPE DESCRIPTION
HSOIC VQFN NAME
1 1,11 PGND G Power ground terminal. Connect to system ground and AGND. Connect to bypass capacitor with short wide traces.
2 2,10 VIN P Input supply to regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin and PGND.
3 9 EN A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN; Do not float.
4 8 PG A Open drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. Flag pulls low when EN = Low. Can be left open when not used.
5 7 FB A Feedback input to regulator. Connect to tap point of feedback voltage divider. Do not float. Do not ground.
6 5 VCC P Internal 5-V LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high-quality 1-µF capacitor from this pin to GND.
7 4 BOOT P Boot-strap supply voltage for internal high-side driver. Connect a high-quality 100-nF capacitor from this pin to the SW pin. On the VQFN package connect the SW pin to NC on the PCB. This simplifies the connection from the CBOOT capacitor to the SW pin.
8 12 SW P Regulator switch node. Connect to power inductor. On the VQFN package connect the SW pin to NC on the PCB. This simplifies the connection from the CBOOT capacitor to the SW pin.
THERMAL
PAD		 6 AGND G Analog ground for regulator and system. Ground reference for internal references and logic. All electrical parameters are measured with respect to this pin. Connect to system ground on PCB. For the HSOIC package, the pad on the bottom of the device serves as both the AGND connection and a thermal connection to the heat sink ground plane. This pad must be soldered to a ground plane to achieve good electrical and thermal performance.
— 3 NC — On the VQFN package the SW pin must be connected to NC on the PCB. This simplifies the connection from the CBOOT capacitor to the SW pin. This pin has no internal connection to the regulator.
A = Analog, P = Power, G = Ground

7 Specifications

7.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range(1)
PARAMETERMINMAXUNIT
VoltagesVIN to PGND–0.338V
EN to AGND(2)–0.3VIN + 0.3
FB to AGND–0.35.5
PG to AGND(2)022
AGND to PGND–0.30.3
SW to PGND–0.3VIN + 0.3V
SW to PGND less than 100-ns transients–3.538
BOOT to SW–0.35.5
VCC to AGND(4)–0.35.5
TJJunction temperature(3)–40150°C
TstgStorage temperature–55150°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The voltage on this pin must not exceed the voltage on the VIN pin by more than 0.3 V
(3) Operating at junction temperatures greater than 125°C, although possible, degrades the lifetime of the device.
(4) Under some operating conditions the VCC LDO voltage may increase beyond 5.5V.

7.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman-body model (HBM) (1)
 		±2500V
Charged-device model (CDM) (2)
 		±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

Over the recommended operating temperature range of –40 °C to 125 °C (unless otherwise noted) (1)
MINMAXUNIT
Input voltageVIN to PGND3.836V
EN (2)0VIN
PG(2)018
Adjustable output voltageVOUT(3)124V
Output currentIOUT03A
(1) Recommended operating conditions indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Section 7.5.
(2) The voltage on this pin must not exceed the voltage on the VIN pin by more than 0.3 V.
(3) The maximum output voltage can be extended to 95% of VIN; contact TI for details.  Under no conditions should the output voltage be allowed to fall below zero volts.

7.4 Thermal Information

The value of RθJA given in this table is only valid for comparison with other packages and can not be used for design purposes. These values were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance obtained in an actual application. For design information  see Maximum Ambient Temperature section.
THERMAL METRIC(1) (2) LMR336x0 UNIT
DDA (HSOIC) RNX (VQFN)
8 PINS 12 PINS
RθJA Junction-to-ambient thermal resistance 42.9(2) 72.5(2) °C/W
RθJC(top) Junction-to-case (top) thermal resistance 54 35.9 °C/W
RθJB Junction-to-board thermal resistance 13.6 23.3 °C/W
ψJT Junction-to-top characterization parameter 4.3 0.8 °C/W
ψJB Junction-to-board characterization parameter 13.8 23.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 4.3 N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) The value of RθJA given in this table is only valid for comparison with other packages and can not be used for design purposes. These values were calculated in accordance with JESD 51-7, and simulated on a 4-layer JEDEC board. They do not represent the performance obtained in an actual application. For design information  see Maximum Ambient Temperature section.

7.5 Electrical Characteristics

Limits apply over the operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN  = 12 V, VEN = 4 V.     
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY VOLTAGE
VINMinimum operating input voltage3.8V
IQNon-switching input current; measured at VIN pin (2)VFB = 1.2 V2434µA
ISDShutdown quiescent current; measured at VIN pinEN = 0510µA
ENABLE
VEN-VCC-HEN input level required to turn on internal LDORising threshold1V
VEN-VCC-LEN input level required to turn off internal LDOFalling threshold0.3V
VEN-HEN input level required to start switchingRising threshold1.21.2311.26V
VEN-HYSHysteresis below VEN-HHysteresis below VEN-H; falling100mV
ILKG-ENEnable input leakage currentVEN = 3.3 V0.2nA
INTERNAL SUPPLIES
VCCInternal LDO output voltage appearing at the VCC pin6 V ≤ VIN ≤ 36 V4.7555.25V
VBOOT-UVLOBootstrap voltage undervoltage lock-out threshold(3)2.2V
VOLTAGE REFERENCE (FB PIN)
VFBFeedback voltage; ADJ option0.98511.015V
IFBCurrent into FB pin; ADJ optionFB = 1 V0.250nA
CURRENT LIMITS(4)
ISCHigh-side current limitLMR336303.854.55.05A
ILIMITLow-side current limitLMR336302.93.54.1A
IPEAK-MINMinimum peak inductor currentLMR336300.69A
IZCZero current detector threshold-0.106A
SOFT START
tSSInternal soft-start time2.946ms
POWER GOOD (PG PIN)
VPG-HIGH-UPPower-good upper threshold - rising% of FB voltage105%107%110%
VPG-HIGH-DNPower-good upper threshold - falling% of FB voltage103%105%108%
VPG-LOW-UPPower-good lower threshold - rising% of FB voltage92%94%97%
VPG-LOW-DNPower-good lower threshold - falling% of FB voltage90%92%95%
tPGPower-good glitch filter delay(1)60170µs
RPGPower-good flag RDSONVIN = 12 V, VEN = 4 V76150Ω
VEN = 0 V3560
VIN-PGMinimum input voltage for proper PG function50-µA, EN = 0 V2V
VPGPG logic low output50-µA, EN = 0 V, VIN = 2V0.2V
OSCILLATOR
ƒSWSwitching frequency"A" Version340400460kHz
ƒSWSwitching frequency"B" Version1.21.41.6MHz
ƒSWSwitching frequency"C" Version, DDA package1.82.12.4MHz
ƒSWSwitching frequency"C" Version, RNX package1.82.12.3MHz
MOSFETS
RDS-ON-HSHigh-side MOSFET ON-resistanceRNX package75145mΩ
RDS-ON-HSHigh-side MOSFET ON-resistanceDDA package95160mΩ
RDS-ON-LSLow-side MOSFET ON-resistanceRNX package5095mΩ
RDS-ON-LSLow-side MOSFET ON-resistanceDDA package66110mΩ
(1) See Power-Good Flag Output for details.
(2) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(3) When the voltage across the CBOOT capacitor falls below this voltage, the low side MOSFET is turned on to recharge CBOOT.
(4) The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application.

7.6 Timing Characteristics

Limits apply over the operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 12 V, VEN = 4 V.
MINNOMMAXUNIT
tON-MINMinimum switch on-timeRNX package6880ns
tON-MINMinimum switch on-timeDDA package75108ns
tOFF-MINMinimum switch off-timeRNX package5270ns
tOFF-MINMinimum switch off-timeDDA package5085ns
tON-MAXMaximum switch on-time79µs

 
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