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SimpleLink™ CC2642R 器件是一款 2.4GHz 无线微控制器 (MCU),支持低功耗 Bluetooth® 5.2 和专有 2.4GHz 应用。该器件经过优化,可用于楼宇安防系统、HVAC、资产跟踪、医疗、有线网络、便携式电子产品、家庭影院和娱乐和联网外设市场以及需要工业性能的应用中的低功耗无线通信和高级检测。该器件的突出特性包括:
CC2642R 器件是 SimpleLink™ MCU 平台的一部分,包括 Wi-Fi®、低功耗蓝牙、Thread、Zigbee、Sub-1GHz MCU 和主机 MCU。CC2642R 是可扩展产品系列(闪存为 32kB 至 704kB)的一部分,具有引脚对引脚兼容的封装选项,并共用一个简单易用的通用开发环境,其中包含单个核心软件开发套件 (SDK) 和丰富的工具集。借助一次性集成的 SimpleLink™ 平台,用户可以将产品组合中器件的任意组合添加到自己的设计中,从而在设计要求变更时实现代码的完全重复使用。如需更多信息,请访问 SimpleLink™ MCU 平台。
器件型号(1) | 封装 | 封装尺寸(标称值) |
---|---|---|
CC2642R1FRGZ | VQFN (48) | 7.00mm × 7.00mm |
Changes from June 12, 2023 to November 28, 2023 (from Revision I (June 2023) to Revision J (November 2023))
Device | RADIO SUPPORT | FLASH (kB) | RAM + Cache (kB) | GPIO | PACKAGE SIZE | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Sub-1 GHz Prop. | 2.4GHz Prop. | Wireless M-Bus | mioty | Wi-SUN® | Sidewalk | Bluetooth® LE | ZigBee | Thread | Multiprotocol | +20 dBm PA | 4 × 4 mm VQFN (24) | 4 × 4 mm VQFN (32) | 5 × 5 mm VQFN (32) | 5 × 5 mm VQFN (40) | 7 × 7 mm VQFN (48) | 8 × 8 mm VQFN (64) | ||||
CC1310 | √ | √ | √ | 32-128 | 16-20 + 8 | 10-30 | √ | √ | √ | |||||||||||
CC1311R3 | √ | √ | √ | 352 | 32 + 8 | 22-30 | √ | √ | ||||||||||||
CC1311P3 | √ | √ | √ | √ | 352 | 32 + 8 | 26 | √ | ||||||||||||
CC1312R | √ | √ | √ | √ | 352 | 80 + 8 | 30 | √ | ||||||||||||
CC1312R7 | √ | √ | √ | √ | √ | √ | 704 | 144 + 8 | 30 | √ | ||||||||||
CC1314R10 | √ | √ | √ | √ | √ | √ | 1024 | 256 + 8 | 30-46 | √ | √ | |||||||||
CC1352R | √ | √ | √ | √ | √ | √ | √ | √ | √ | 352 | 80 + 8 | 28 | √ | |||||||
CC1354R10 | √ | √ | √ | √ | √ | √ | √ | √ | √ | 1024 | 256 + 8 | 28-42 | √ | √ | ||||||
CC1352P | √ | √ | √ | √ | √ | √ | √ | √ | √ | √ | 352 | 80 + 8 | 26 | √ | ||||||
CC1352P7 | √ | √ | √ | √ | √ | √ | √ | √ | √ | √ | √ | 704 | 144 + 8 | 26 | √ | |||||
CC1354P10 | √ | √ | √ | √ | √ | √ | √ | √ | √ | √ | √ | 1024 | 256 + 8 | 26-42 | √ | √ | ||||
CC2340R5(1) | √ | √ | √ | √ | 512 | 36 | 12-26 | √ | √ | |||||||||||
CC2640R2F | √ | 128 | 20 + 8 | 10-31 | √ | √ | √ | |||||||||||||
CC2642R | √ | 352 | 80 + 8 | 31 | √ | |||||||||||||||
CC2642R-Q1 | √ | 352 | 80 + 8 | 31 | √ | |||||||||||||||
CC2651R3 | √ | √ | √ | 352 | 32 + 8 | 23-31 | √ | √ | ||||||||||||
CC2651P3 | √ | √ | √ | √ | 352 | 32 + 8 | 22-26 | √ | √ | |||||||||||
CC2652R | √ | √ | √ | √ | √ | 352 | 80 + 8 | 31 | √ | |||||||||||
CC2652RB | √ | √ | √ | √ | √ | 352 | 80 + 8 | 31 | √ | |||||||||||
CC2652R7 | √ | √ | √ | √ | √ | 704 | 144 + 8 | 31 | √ | |||||||||||
CC2652P | √ | √ | √ | √ | √ | √ | 352 | 80 + 8 | 26 | √ | ||||||||||
CC2652P7 | √ | √ | √ | √ | √ | √ | 704 | 144 + 8 | 26 | √ | ||||||||||
CC2674R10 | √ | √ | √ | √ | √ | 1024 | 256 + 8 | 31-45 | √ | √ | ||||||||||
CC2674P10 | √ | √ | √ | √ | √ | √ | 1024 | 256 + 8 | 26-45 | √ | √ |
The following I/O pins marked in Figure 7-1 in bold have high-drive capabilities:
The following I/O pins marked in Figure 7-1 in italics have analog capabilities:
PIN | I/O | TYPE | DESCRIPTION | |
---|---|---|---|---|
NAME | NO. | |||
DCDC_SW | 33 | — | Power | Output from internal DC/DC converter(1) |
DCOUPL | 23 | — | Power | For decoupling of internal 1.27 V regulated digital-supply (2) |
DIO_0 | 5 | I/O | Digital | GPIO |
DIO_1 | 6 | I/O | Digital | GPIO |
DIO_2 | 7 | I/O | Digital | GPIO |
DIO_3 | 8 | I/O | Digital | GPIO |
DIO_4 | 9 | I/O | Digital | GPIO |
DIO_5 | 10 | I/O | Digital | GPIO, high-drive capability |
DIO_6 | 11 | I/O | Digital | GPIO, high-drive capability |
DIO_7 | 12 | I/O | Digital | GPIO, high-drive capability |
DIO_8 | 14 | I/O | Digital | GPIO |
DIO_9 | 15 | I/O | Digital | GPIO |
DIO_10 | 16 | I/O | Digital | GPIO |
DIO_11 | 17 | I/O | Digital | GPIO |
DIO_12 | 18 | I/O | Digital | GPIO |
DIO_13 | 19 | I/O | Digital | GPIO |
DIO_14 | 20 | I/O | Digital | GPIO |
DIO_15 | 21 | I/O | Digital | GPIO |
DIO_16 | 26 | I/O | Digital | GPIO, JTAG_TDO, high-drive capability |
DIO_17 | 27 | I/O | Digital | GPIO, JTAG_TDI, high-drive capability |
DIO_18 | 28 | I/O | Digital | GPIO |
DIO_19 | 29 | I/O | Digital | GPIO |
DIO_20 | 30 | I/O | Digital | GPIO |
DIO_21 | 31 | I/O | Digital | GPIO |
DIO_22 | 32 | I/O | Digital | GPIO |
DIO_23 | 36 | I/O | Digital or Analog | GPIO, analog capability |
DIO_24 | 37 | I/O | Digital or Analog | GPIO, analog capability |
DIO_25 | 38 | I/O | Digital or Analog | GPIO, analog capability |
DIO_26 | 39 | I/O | Digital or Analog | GPIO, analog capability |
DIO_27 | 40 | I/O | Digital or Analog | GPIO, analog capability |
DIO_28 | 41 | I/O | Digital or Analog | GPIO, analog capability |
DIO_29 | 42 | I/O | Digital or Analog | GPIO, analog capability |
DIO_30 | 43 | I/O | Digital or Analog | GPIO, analog capability |
EGP | — | — | GND | Ground – exposed ground pad(3) |
JTAG_TMSC | 24 | I/O | Digital | JTAG TMSC, high-drive capability |
JTAG_TCKC | 25 | I | Digital | JTAG TCKC |
RESET_N | 35 | I | Digital | Reset, active low. No internal pullup resistor |
RF_P | 1 | — | RF | Positive RF input signal to LNA during RX Positive RF output signal from PA during TX |
RF_N | 2 | — | RF | Negative RF input signal to LNA during RX Negative RF output signal from PA during TX |
VDDR | 45 | — | Power | Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2)(4)(6) |
VDDR_RF | 48 | — | Power | Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2)(5)(6) |
VDDS | 44 | — | Power | 1.8 V to 3.8 V main chip supply(1) |
VDDS2 | 13 | — | Power | 1.8 V to 3.8 V DIO supply(1) |
VDDS3 | 22 | — | Power | 1.8 V to 3.8 V DIO supply(1) |
VDDS_DCDC | 34 | — | Power | 1.8 V to 3.8 V DC/DC converter supply |
X48M_N | 46 | — | Analog | 48 MHz crystal oscillator pin 1 |
X48M_P | 47 | — | Analog | 48 MHz crystal oscillator pin 2 |
X32K_Q1 | 3 | — | Analog | 32 kHz crystal oscillator pin 1 |
X32K_Q2 | 4 | — | Analog | 32 kHz crystal oscillator pin 2 |
FUNCTION | SIGNAL NAME | PIN NUMBER | ACCEPTABLE PRACTICE(1) | PREFERRED PRACTICE(1) |
---|---|---|---|---|
GPIO | DIO_n |
5–12 14–21 26–32 36–43 |
NC or GND | NC |
32.768 kHz crystal | X32K_Q1 | 3 | NC or GND | NC |
X32K_Q2 | 4 | |||
DC/DC converter(2) | DCDC_SW | 33 | NC | NC |
VDDS_DCDC | 34 | VDDS | VDDS |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VDDS(3) | Supply voltage | –0.3 | 4.1 | V | |
Voltage on any digital pin(4)(5) | –0.3 | VDDS + 0.3, max 4.1 | V | ||
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X48M_N and X48M_P | –0.3 | VDDR + 0.3, max 2.25 | V | ||
Vin | Voltage on ADC input | Voltage scaling enabled | –0.3 | VDDS | V |
Voltage scaling disabled, internal reference | –0.3 | 1.49 | |||
Voltage scaling disabled, VDDS as reference | –0.3 | VDDS / 2.9 | |||
Input level, RF pins | 5 | dBm | |||
Tstg | Storage temperature | –40 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
VESD | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | All pins | ±2000 | V |
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) | All pins | ±500 | V |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Operating junction temperature(2) | –40 | 105 | °C | |
Operating supply voltage (VDDS) | 1.8 | 3.8 | V | |
Rising supply voltage slew rate | 0 | 100 | mV/µs | |
Falling supply voltage slew rate(1) | 0 | 20 | mV/µs |
PARAMETER | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|
VDDS Power-on-Reset (POR) threshold | 1.1 - 1.55 | V | |||
VDDS Brown-out Detector (BOD) (1) | Rising threshold | 1.77 | V | ||
VDDS Brown-out Detector (BOD), before initial boot (2) | Rising threshold | 1.70 | V | ||
VDDS Brown-out Detector (BOD) (1) | Falling threshold | 1.75 | V |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Core Current Consumption | ||||||
Icore | Reset and Shutdown | Reset. RESET_N pin asserted or VDDS below power-on-reset threshold | 150 | nA | ||
Shutdown. No clocks running, no retention | 150 | |||||
Standby without cache retention |
RTC running, CPU, 80 kB RAM and (partial) register retention. RCOSC_LF |
0.94 | µA | |||
RTC running, CPU, 80 kB RAM and (partial) register retention XOSC_LF |
1.09 | µA | ||||
Standby with cache retention |
RTC running, CPU, 80 kB RAM and (partial) register retention. RCOSC_LF |
3.2 | µA | |||
RTC running, CPU, 80 kB RAM and (partial) register retention. XOSC_LF |
3.3 | µA | ||||
Idle | Supply Systems and RAM powered RCOSC_HF |
675 | µA | |||
Active | MCU running CoreMark at 48 MHz RCOSC_HF |
3.39 | mA | |||
Peripheral Current Consumption, (1), (2) | ||||||
Iperi | Peripheral power domain | Delta current with domain enabled | 97.7 | µA | ||
Serial power domain | Delta current with domain enabled | 7.2 | ||||
RF Core | Delta current with power domain enabled, clock enabled, RF core idle |
210.9 | ||||
µDMA | Delta current with clock enabled, module is idle | 63.9 | ||||
Timers | Delta current with clock enabled, module is idle(5) | 81.0 | ||||
I2C | Delta current with clock enabled, module is idle | 10.1 | ||||
I2S | Delta current with clock enabled, module is idle | 26.3 | ||||
SSI | Delta current with clock enabled, module is idle | 82.9 | ||||
UART | Delta current with clock enabled, module is idle(3) | 167.5 | ||||
CRYPTO (AES) | Delta current with clock enabled, module is idle(4) |
25.6 | ||||
PKA | Delta current with clock enabled, module is idle |
84.7 | ||||
TRNG | Delta current with clock enabled, module is idle |
35.6 | ||||
Sensor Controller Engine Consumption | ||||||
ISCE | Active mode | 24 MHz, infinite loop | 808.5 | µA | ||
Low-power mode | 2 MHz, infinite loop | 30.1 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Radio receive current | 2440 MHz | 6.9 | mA | |||
Radio transmit current 2.4 GHz PA (BLE) |
0 dBm output power setting 2440 MHz |
7.0 | mA | |||
+5 dBm output power setting 2440 MHz |
9.2 | mA |