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  • TPS7A52-Q1 2A 高精度汽车级低噪声 LDO 稳压器

    • ZHCSHE2B September   2017  – June 2018 TPS7A52-Q1

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  • TPS7A52-Q1 2A 高精度汽车级低噪声 LDO 稳压器
  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      为射频组件供电
      2.      输出电压噪声与频率和输出电压间的关系
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Regulation Features
        1. 7.3.1.1 DC Regulation
        2. 7.3.1.2 AC and Transient Response
      2. 7.3.2 System Start-Up Features
        1. 7.3.2.1 Programmable Soft Start (NR/SS Pin)
        2. 7.3.2.2 Internal Sequencing
          1. 7.3.2.2.1 Enable (EN)
          2. 7.3.2.2.2 Undervoltage Lockout (UVLO) Control
          3. 7.3.2.2.3 Active Discharge
        3. 7.3.2.3 Power-Good Output (PG)
      3. 7.3.3 Internal Protection Features
        1. 7.3.3.1 Foldback Current Limit (ICL)
        2. 7.3.3.2 Thermal Protection (Tsd)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Regulation
      2. 7.4.2 Disabled
      3. 7.4.3 Current Limit Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Recommended Capacitor Types
        1. 8.1.1.1 Input and Output Capacitor Requirements (CIN and COUT)
        2. 8.1.1.2 Noise-Reduction and Soft-Start Capacitor (CNR/SS)
        3. 8.1.1.3 Feed-Forward Capacitor (CFF)
      2. 8.1.2  Soft-Start and Inrush Current
      3. 8.1.3  Optimizing Noise and PSRR
      4. 8.1.4  Charge Pump Noise
      5. 8.1.5  Current Sharing
      6. 8.1.6  Adjustable Operation
      7. 8.1.7  Power-Good Operation
      8. 8.1.8  Undervoltage Lockout (UVLO) Operation
      9. 8.1.9  Dropout Voltage (VDO)
      10. 8.1.10 Load Transient Response
      11. 8.1.11 Reverse Current Protection Considerations
      12. 8.1.12 Power Dissipation (PD)
      13. 8.1.13 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
      2. 10.1.2 RTK Package—High CTE Mold Compound
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 评估模块
        2. 11.1.1.2 参考设计
        3. 11.1.1.3 Spice 模型
      2. 11.1.2 器件命名规则
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 术语表
  12. 12机械、封装和可订购信息
  13. 重要声明
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DATA SHEET

TPS7A52-Q1 2A 高精度汽车级低噪声 LDO 稳压器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 符合汽车类应用的 标准
  • 符合面向汽车应用的 AEC-Q100 标准：
    • 温度等级 1：–40°C ≤ TA ≤ +125°C
    • HBM ESD 分类等级 2
    • CDM ESD 分类等级 C4A
  • 扩展结温 (TJ) 范围：–40°C 至 +150°C
  • 输入电压范围：
    • 无偏置：1.4V 至 6.5V
    • 有偏置：1.1V 至 6.5V
  • 可调输出电压范围：0.8V 至 5.2V
  • 低压降：2A 电流时为 115mV（最大值）（带偏置）
  • 输出电压噪声：4.4µVRMS
  • 线路、负载和温度范围内的偏置精度最大值为 1%
  • 电源纹波抑制：
    • 500kHz 时为 40dB
  • 可调软启动浪涌控制
  • 开漏电源正常 (PG) 输出
  • 封装：
    • 3.5mm × 3.5mm 20 引脚 VQFN
    • 具有可湿性侧面和高 CTE (12ppm/°C) 塑封料的 4mm × 4mm 20 引脚 VQFNP

2 应用

  • 远程信息处理控制单元
  • 信息娱乐系统和仪表组
  • 高速接口（PLL 和 VCO）

3 说明

器件 TPS7A52-Q1 是一款低噪声 (4.4µVRMS)、低压差线性稳压器 (LDO)，可提供 2A 拉电流，同时最大压差仅为 115mV。该器件的输出电压可通过外部电阻分压器进行调节，范围为 0.8V 至 5.2V。

TPS7A52-Q1 集低噪声 (4.4µVRMS)、高 PSRR 和高输出电流能力等特性于一体，非常适合为雷达功率和信息娱乐等 应用中的噪声敏感型组件供电。此器件的优秀性能可抑制电源产生的相位噪声和时钟抖动，因此非常适合为射频放大器、雷达传感器和芯片组供电。射频放大器尤其受益于该器件的高性能和 5.0V 输出能力。

对于需要以低输入电压和低输出 (LILO) 电压运行的数字负载（例如专用集成电路 (ASIC)、现场可编程门阵列 (FPGA) 和数字信号处理器 (DSP)），TPS7A52-Q1 所具备的极高的精度（在负载和温度范围内可达 1%）、遥感功能、出色的瞬态性能和软启动能力可确保实现出色的系统性能。

TPS7A52-Q1 器件的多功能性使其成为许多要求严苛的 应用的首选组件。

器件信息(1)

器件型号 封装 封装尺寸（标称值）
TPS7A52-Q1 超薄四方扁平无引线封装 (VQFN) (20) 3.50mm x 3.50mm
可湿性侧面 VQFNP (20) 4.00mm x 4.00mm
  1. 如需了解所有可用封装，请参阅产品说明书末尾的封装选项附录。

Device Images

为射频组件供电

TPS7A52-Q1 tps7a52-q1-powering-rf-components.gif

输出电压噪声与
频率和输出电压间的关系

TPS7A52-Q1 Noise_vs_Vout.gif

4 修订历史记录

Changes from A Revision (February 2018) to B Revision

  • Added 添加了新的 RTK (VQFNP) 封装和相关内容Go
  • Changed plots at IOUT > 2 A in Typical Characteristics section to match values shown in Specifications sectionGo
  • Changed all IOUT test conditions from 3 A to 2 A to match values shown in Specifications sectionGo
  • Changed all plots to use default COUT = 22 µFGo
  • Changed Figure 48 to load transient plotGo
  • Changed Figure 49 to noise plotGo

Changes from * Revision (September 2017) to A Revision

  • Changed 从产品预览更改为生产数据（有效）Go

5 Pin Configuration and Functions

RGR Package
3.5-mm × 3.5-mm, 20-Pin VQFN
Top View
RTK Package
4-mm × 4-mm, 20-Pin VQFNP With Wettable Flanks
Top View

Pin Functions

PIN DESCRIPTION
NAME NO. I/O
BIAS 12 I BIAS supply voltage. This pin enables the use of low-input voltage, low-output (LILO) voltage conditions (that is, VIN = 1.2 V, VOUT = 1 V) to reduce power dissipation across the die. The use of a BIAS voltage improves dc and ac performance for VIN ≤ 2.2 V. A 10-µF capacitor or larger must be connected between this pin and ground. If not used, this pin must be left floating or tied to ground.
DNC 5 — Do not connect
EN 14 I Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. If enable functionality is not required, this pin must be connected to IN or BIAS.
FB 3 I Feedback pin connected to the error amplifier. Although not required, a 10-nF feed-forward capacitor from FB to OUT (as close to the device as possible) is recommended to maximize ac performance. The use of a feed-forward capacitor can disrupt PG (power good) functionality.
GND 8, 18 — Ground pin. These pins must be connected to ground, the thermal pad, and each other with a low-impedance connection.
IN 15-17 I Input supply voltage pin. A 10-µF or larger ceramic capacitor (5 µF or greater of capacitance) from IN to ground is recommended to reduce the impedance of the input supply. Place the input capacitor as close to the input as possible.
NC 2, 6, 7, 9, 10, 11 — No internal connection
NR/SS 13 — Noise-reduction and soft-start pin. Connecting an external capacitor between this pin and ground reduces reference voltage noise and also enables the soft-start function. Although not required, a 10-nF or larger capacitor is recommended to be connected from NR/SS to GND (as close to the pin as possible) to maximize ac performance.
OUT 1, 19, 20 O Regulated output pin. A 22-µF or larger ceramic capacitor (10 µF or greater of capacitance) from OUT to ground is required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT pin to the load.
PG 4 O Active-high, power-good pin. An open-drain output indicates when the output voltage reaches VIT(PG) of the target. The use of a feed-forward capacitor may disrupt PG (power good) functionality.
Thermal pad Thermal pad — Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND.

6 Specifications

 
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