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  • LM5161 100V 宽输入、1A 同步降压/Fly-Buck™ 转换器

    • ZHCSFE3B March   2016  – November 2017 LM5161

      PRODUCTION DATA.  

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  • LM5161 100V 宽输入、1A 同步降压/Fly-Buck™ 转换器
  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型降压应用电路
      2.      典型 Fly-Buck 应用电路
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Circuit
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Soft-Start
      5. 7.3.5  Error Transconductance (GM) Amplifier
      6. 7.3.6  On-Time Generator
      7. 7.3.7  Current Limit
      8. 7.3.8  N-Channel Buck Switch and Driver
      9. 7.3.9  Synchronous Rectifier
      10. 7.3.10 Enable / Undervoltage Lockout (EN/UVLO)
      11. 7.3.11 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Forced Pulse Width Modulation (FPWM) Mode
      2. 7.4.2 Undervoltage Detector
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 LM5161 Synchronous Buck (15-V to 95-V Input, 12-V Output, 1-A Load)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Output Resistor Divider Selection
          3. 8.2.1.2.3  Frequency Selection
          4. 8.2.1.2.4  Inductor Selection
          5. 8.2.1.2.5  Output Capacitor Selection
          6. 8.2.1.2.6  Series Ripple Resistor - RESR (FPWM = 1)
          7. 8.2.1.2.7  VCC and Bootstrap Capacitor
          8. 8.2.1.2.8  Input Capacitor Selection
          9. 8.2.1.2.9  Soft-Start Capacitor Selection
          10. 8.2.1.2.10 EN/UVLO Resistor Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 LM5161 Isolated Fly-Buck (36-V to 72-V Input, 12-V, 12-W Isolated Output)
        1. 8.2.2.1 LM5161 Fly-Buck Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Selection of VOUT and Turns Ratio
          2. 8.2.2.2.2 Secondary Rectifier Diode
          3. 8.2.2.2.3 External Ripple Circuit
          4. 8.2.2.2.4 Output Capacitor (CVISO)
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Ripple Configuration
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息
  13. 重要声明
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DATA SHEET

LM5161 100V 宽输入、1A 同步降压/Fly-Buck™ 转换器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • 4.5V 至 100V 宽输入电压范围
  • 集成高侧和低侧开关
    • 无需肖特基二极管
  • 1A 最大负载电流
  • 恒定导通时间控制
    • 无外部环路补偿
    • 快速瞬态响应
  • 轻载条件下可选择 DCM 降压操作
  • CCM 选项支持多输出 Fly-Buck™
  • 无需外部纹波电路（FPWM = 0 时）
  • 近似恒定的开关频率
  • 频率最高可调节至 1MHz
  • 可编程软启动时间
  • 预偏置启动
  • 峰值电流限制保护
  • 可调输入欠压闭锁 (UVLO) 和滞后
  • ±1% 反馈电压基准
  • 热关断保护
  • 使用 LM5161 并借助 WEBENCH® 电源设计器创建定制设计方案

2 应用

  • 工业可编程逻辑控制器
  • IGBT 栅极驱动偏置电源
  • 电信直流/直流的初级侧和次级侧偏置
  • 电子电表电力线通信
  • 低功耗 (< 12W) 隔离式 DC-DC (Fly-Buck)

3 说明

LM5161 是一款集成高侧和低侧金属氧化物半导体场效应晶体管 (MOSFET) 的 100V、1A 同步降压转换器。恒定导通时间控制方案无需环路补偿，支持快速瞬态响应下的高降压比。内部反馈放大器在完整工作温度范围保持 ±1% 的输出电压调节率。导通时间与输入电压成反比，产生近似恒定的开关频率。峰谷电流限制电路可防止发生过载。欠压锁定 (EN/UVLO) 电路独立提供可调节输入欠电压阈值和迟滞。LM5161 通过其 FPWM 输入引脚可选择在所有负载水平下以强制连续导通模式 (CCM) 运行，或在轻载或空载条件下以断续导通模式 (DCM) 运行。在强制 CCM 下运行时，LM5161 支持多输出和隔离式 Fly-Buck 应用中，低功耗是一个关键问题。当通过编程实现 DCM 操作时，LM5161 提供严格稳压的降压输出，无需使用任何外部纹波反馈注入电路。

器件信息(1)

器件型号 封装 封装尺寸（标称值）
LM5161 HTSSOP (14) 5.00 mm × 4.40 mm
  1. 如需了解所有可用封装，请参阅产品说明书末尾的可订购产品附录。

Device Images


典型降压应用电路

LM5161 Buck_fpg_snvsae3.gif

典型 Fly-Buck 应用电路

LM5161 fbk_fpg_snvsae3.gif

4 修订历史记录

Changes from A Revision (August 2016) to B Revision

  • Added WEBENCH 链接；TI Designs 的顶部导航图标 Go
  • Deleted the lead temperature from the Abs Max table Go

Changes from * Revision (March 2016) to A Revision

  • “产品预览”至“量产数据”版本Go

5 Pin Configuration and Functions

PWP Package
14-Pin HTSSOP With Exposed Pad
Top View
LM5161 PINOUT_r4_snvu504.gif

Pin Functions

PIN I/O DESCRIPTION
NAME HTSSOP
AGND 1 - Analog ground. Ground connection of internal control circuits.
PGND 2 - Power ground. Ground connection of the internal synchronous rectifier FET.
VIN 3 I Input supply connection. Operating input range is 4.5-V to 100-V.
EN/UVLO 4 I Precision enable. Input pin of undervoltage lockout (UVLO) comparator.
RON 5 I On-time programming pin. A resistor between this pin and VIN sets the switch ON-time as a function of input voltage.
SS 6 I Soft start. Connect a capacitor from SS to AGND to control output rise time and limit overshoot.
FPWM 8 I Forced PWM logic input pin. Connect to AGND for discontinuous conduction mode (DCM) with light loads. Connect to VCC for continuous conduction mode (CCM) at all loads and Fly-Buck configuration.
FB 9 I Feedback input of voltage regulation comparator.
VCC 10 O Internal high voltage start-up regulator bypass capacitor pin.
BST 11 I Bootstrap capacitor pin. Connect a capacitor between BST and SW to bias gate driver of high-side buck FET.
SW 12,13 O Switch node. Source connection of high side buck FET and drain connection of low-side synchronous rectifier FET.
NC 7,14 No connection
EP - Exposed pad. Connect to AGND and printed-circuit board ground plane to improve power dissipation.

6 Specifications

6.1 Absolute Maximum Ratings

MIN MAX UNIT
Input voltage VIN to AGND –0.3 100 V
EN/UVLO to AGND –0.3 100
RON to AGND –0.3 100
BST to AGND –0.3 114
VCC to AGND –0.3 14
FPWM to AGND –0.3 14
SS to AGND –0.3 7
FB to AGND –0.3 7
Output voltage BST to SW –0.3 14 V
BST to VCC 100
SW to AGND –1.5 100
SW to AGND (20-ns transient) –3
Maximum junction temperature(3) –40 150 °C
Storage temperature Tstg –65 150 °C
  1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions . Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
  2. If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
  3. High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
VIN input voltage 4.5 100 V
IO output current 1 A
External VCC bias voltage 9 13 V
Operating junction temperature(2) –40 125 °C
(1) Recommended Operating Ratings are conditions under the device is intended to be functional. For specifications and test conditions, see Electrical Characteristics.
(2) High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.

6.4 Thermal Information

See (1)
THERMAL METRIC LM5161 UNIT
PWP (HTSSOP)
14 PINS
RθJA Junction-to-ambient thermal resistance(1) 39.3 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance(1) 2.0 °C/W
ψJB Junction-to-board thermal characteristic parameter 19.3 °C/W
RθJB Junction-to-board thermal resistance 19.6 °C/W
RθJCtop Junction-to-case (top) thermal resistance 22.8 °C/W
ψJT Junction-to-top thermal characteristic parameter 0.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over TJ = –40°C to 125°C(1)(2) for LM5161. Unless otherwise stated, VIN = 48 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
ISD Input shutdown current VIN = 48 V, EN/UVLO = 0 V 50 90 µA
IOP Input operating current VIN = 48 V, FB = 3 V, Non-switching 2.3 2.8 mA
VCC SUPPLY
VCC Bias regulator output VIN = 48 V, ICC = 20 mA 6.3 7.3 8.5 V
VCC Bias regulator current limit VIN = 48 V 30 mA
VCC(UV) VCC undervoltage threshold VCC rising 3.98 4.1 V
VCC(HYS) VCC undervoltage hysteresis VCC falling 185 mV
VCC(LDO) VIN - VCC dropout voltage VIN = 4.5 V, ICC = 20 mA 200 340 mV
HIGH-SIDE FET
RDS(ON) High-side on resistance V(BST - SW) = 7 V, ISW = 0.5A 0.58 Ω
BST(UV) Bootstrap gate drive UV V(BST - SW) rising 2.93 3.6 V
BST(HYS) Gate drive UV hysteresis V(BST - SW) falling 200 mV
LOW-SIDE FET
RDS(ON) Low-side on resistance ISW = 0.5 A 0.24 Ω
HIGH-SIDE CURRENT LIMIT
ILIM(HS) High-side current limit threshold 1.3 1.61 1.9 A
TRES Current limit response time ILIM(HS)threshold detect to FET turn-off 100 ns
TOFF Current limit forced off-time FB = 0 V, VIN = 72 V 13 16.5 21 µs
TOFF1 Current limit forced off-time FB = 0.1 V, VIN = 72 V 10 13 17 µs
TOFF2 Current limit forced off-time FB = 1 V, VIN = 72 V 2 2.7 4.1 µs
LOW-SIDE CURRENT LIMIT
ISOURCE(LS) Sourcing current limit 1.3 1.6 1.9 A
ISINK(LS) Sinking current limit 3
DIODE EMULATION
VFPWM(LOW) FPWM input logic low VIN = 48 V 1 V
VFPWM(HIGH) FPWM input logic high VIN = 48 V 3
IZX Zero cross detect current FPWM = 0 (Diode emulation) 22.5 mA
REGULATION COMPARATOR
VREF FB regulation level VIN = 48 V 1.975 2 2.015 V
I(BIAS) FB input bias current VIN = 48 V 100 nA
ERROR CORRECTION AMPLIFIER AND SOFT START
GM Error amp transconductance FB = VREF (±) 10 mV 100 µA/V
IEA(SOURCE) Error amp source current FB = 1 V, SS = 1 V 7.5 10 12.5 µA
IEA(SINK) Error amp sink current FB = 5 V, SS = 2.25 V 7.5 10 12.5
V(SS-FB) VSS - VFB clamp voltage FB = 1.75 V, CSS= 1 nF 135 mV
ISS Soft-start charging current SS = 0.5 V 7.5 10 12.5 µA
ENABLE/UVLO
VUVLO(TH) UVLO threshold EN/UVLO rising 1.195 1.24 1.272 V
IUVLO(HYS) UVLO hysteresis current EN/UVLO = 1.4 V 15 20 25 µA
VSD(TH) Shutdown mode threshold EN/UVLO falling 0.29 0.35 V
VSD(HYS) Shutdown threshold hysteresis EN/UVLO rising 50 mV
THERMAL SHUTDOWN
TSD Thermal shutdown threshold 175 °C
TSD(HYS) Thermal shutdown hysteresis 20 °C
  1. All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
  2. The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) as follows: TJ = TA + (PD • RθJA) where RθJA (in °C/W) is the package thermal impedance provided in the Thermal Information section.

6.6 Switching Characteristics(1)

Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over TJ = –40°C to 125°C for LM5161. Unless otherwise stated, VIN = 48 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
MINIMUM OFF-TIME
TOFF-MIN Minimum off-time, FB = 0 V 170 ns
TOFF-MIN Minimum off-time, FB = 0 V, VIN = 4.5 V 200 ns
ON-TIME GENERATOR
TON Test 1 VIN = 24 V, RON = 100 kΩ 420 540 665 ns
TON Test 2 VIN = 48 V, RON = 100 kΩ 270 ns
TON Test 3 VIN = 8 V, RON = 100 kΩ 1150 1325 1500 ns
TON Test 4 VIN = 72V, RON = 150 kΩ 285 ns
(1) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

6.7 Typical Characteristics

At TA = 25°C and applicable to LM5161 unless otherwise noted.
LM5161 eff_3v3_fpwm0_SNVU504.gif
VOUT = 3.3 V RON = 110 kΩ
FPWM = 0
Figure 1. Efficiency at 300 kHz
LM5161 EFF_12VOUT_fpwm1_ext_vs_intVcc_SNVU504.gif
VOUT = 12 V RON = 402 kΩ
FPWM = 0 L = 100 µH
Figure 3. Efficiency at 300 kHz
LM5161 LineReg_extVcc_fpwm1_SNVU504.gif
VOUT = 12 V RON = 300 kΩ
FPWM = 1 L = 100 µH
Figure 5. Line Regulation
LM5161 Icc_vcc_SNVU504.gif
VIN = 48 V
Figure 7. VCC vs ICC
LM5161 cl_fb_SNVU504.gif
Figure 9. TOFF (ILIM) vs VFB
LM5161 ONTIME_12V_5V_SNVU504.gif
Figure 11. TON vs VIN
LM5161 SD_VIN_SNVU504.gif
Figure 13. Shutdown Current vs VIN
LM5161 VRON_VIN_R1_SNVU504.gif
Figure 15. Voltage at RON pin vs Input Voltage
LM5161 Ref_TEMP_SNVU504.gif
VIN = 48 V
Figure 17. Reference Voltage vs Temperature
LM5161 SD_TEMP_SNVU504.gif
VIN = 48 V
Figure 19. Input Shutdown Current vs Temperature
LM5161 CL_TEMP_SNVU504.gif
VIN = 48 V
Figure 21. Current Limit vs Temperature
LM5161 FPWM_TEMP_SNVU504.gif
VIN = 48 V
Figure 23. FPWM Threshold vs Temperature
LM5161 Eff_5V_300k_CCMvsDCM_SNVU504.gif
VOUT = 5 V RON = 169 kΩ
L=47 µH
Figure 2. Efficiency at 300 kHz
LM5161 eff_VIN_12Vout_fpwm1_SNVU504.gif
VOUT = 12 V RON = 402 kΩ
FPWM = 1 L = 100 µH
Figure 4. Efficiency at 300 kHz
LM5161 Vcc_VIN_SNVU504.gif
Figure 6. VCC vs VIN
LM5161 ICCvsExtVCC_SNVU504.gif
IOUT = 1 A FPWM = 0
Figure 8. ICC vs External VCC
LM5161 OnTime_VIN_SNVU504.gif
Figure 10. TON vs VIN
LM5161 Fsw_vs_VIN_R1_SNVU504.gif
VOUT = 12 V
Figure 12. FSW vs VIN
LM5161 Operating_VIN_SNVU504.gif
VFB = 3 V
Figure 14. IIN vs VIN (Operating, Non Switching)
LM5161 GD_UVLO_TEMP_SNVU504.gif
VIN = 48 V
Figure 16. Gate Drive UVLO vs Temperature
LM5161 OP_TEMP_SNVU504.gif
VIN = 48 V
Figure 18. Input Operating Current vs Temperature
LM5161 Vcc_UVLO_TEMP_SNVU504.gif
VIN = 48 V
Figure 20. VCC UVLO vs Temperature
LM5161 sinkCL_TEMP_SNVU504.gif
VIN = 48 V
Figure 22. Sink Current Limit vs Temperature
LM5161 RDSON_TEMP_SNVU504.gif
ISW = 500 mA VIN = 48 V
Figure 24. Switch Resistance vs Temperature

 
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