DATA SHEET
具有看门狗功能的 TPL5010 纳瓦级功耗系统计时器
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1 特性
- 电源电压范围为 1.8V 至 5.5V
- 电压为 2.5V 时，电流消耗为 35nA（典型值）
- 可选计时间隔：100ms 至 7200s
- 计时器精度：1%（典型值）
- 可通过电阻选择时间间隔
- 看门狗功能
- 手动复位
2 应用
- 电池供电系统
- 物联网 (IoT)
- 出入探测
- 篡改检测
- 家庭自动化传感器
- 温度调节装置
- 消费类电子产品
- 远程传感器
- 白色家电
3 说明
TPL5010 纳瓦级计时器是一款超低功耗计时器，其看门狗功能专为占空比、电池供电型 应用 （比如物联网中的应用）中的系统唤醒功能而设计。其中许多 应用 需要使用 μC，因此，通常希望将 μC 维持在低功耗模式以更大限度节省电流，而仅在某些时间间隔内唤醒以收集数据或为中断提供服务。虽然 μC 的内部计时器可用于系统唤醒，但它可能单独消耗数微安的总系统电流。
TPL5010 仅消耗 35nA，可替代集成式 μC 计时器的功能。这样就可将 μC 置于低得多的功耗模式，将内部计时器关闭，并在被 TPL5010 中断时仅返回到激活模式。TPL5010 通过提供近两个数量级的功率节省，可以大幅减小能量采集或无线传感器 应用中所使用的电池尺寸。TPL5010 提供 100ms 至 7200s 的可选时间间隔，适用于中断驱动型 应用。出于安全考虑，某些标准（如 EN50271）要求实现看门狗功能。TPL5010 不仅实现了看门狗功能，而且几乎没有增加功耗。TPL5010 采用 6 引脚小外形尺寸晶体管 (SOT23) 封装。
器件信息(1)
| 器件编号 | 封装 | 封装尺寸（标称值） |
|---|---|---|
| TPL5010 | SOT23 (6) | 3.00mm × 3.00mm |
- 如需了解所有可用封装，请参阅产品说明书末尾的可订购产品附录。
Device Images
简化应用电路原理图
6 Pin Configuration and Functions
DDC Package
6-Lead SOT-23
Top View
Pin Functions
| PIN | TYPE(1) | DESCRIPTION | APPLICATION INFORMATION | |
|---|---|---|---|---|
| NO. | NAME | |||
| 1 | VDD | P | Supply voltage | |
| 2 | GND | G | Ground | |
| 3 | DELAY/ M_RST | I | Time Interval set and Manual Reset | Resistance between this pin and GND is used to select the time interval. The reset switch is also connected to this pin. |
| 4 | DONE | I | Logic Input for watchdog functionality | Digital signal driven by the µC to indicate successful processing of the WAKE signal. |
| 5 | WAKE | O | Timer output signal generated every tIP period. | Digital pulsed signal to wake up the µC at the end of the programmed time interval. |
| 6 | RSTn | O | Reset Output (open drain output) | Digital signal to RESET the µC, pullup resistance is required |
(1) G= Ground, P= Power, O= Output, I= Input.
7 Specifications
7.1 Absolute Maximum Ratings(1)
| MIN | MAX | UNIT | ||||
|---|---|---|---|---|---|---|
| Supply Voltage (VDD-GND) | –0.3 | 6 | V | |||
| Input Voltage at any pin(3) | –0.3 | VDD + 0.3 | V | |||
| Input Current on any pin | –5 | +5 | mA | |||
| Junction Temperature, TJ(2) | 150 | °C | ||||
| Storage Temperature, Tstg | –65 | 150 | °C | |||
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum power dissipation is a function of TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a printed-circuit board (PCB).
(3) The voltage between any two pins should not exceed 6V.
7.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human Body Model, per ANSI/ESDA/JEDEC JS-001(1) | ±1000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-101(2) | ±250 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Ratings
| MIN | MAX | UNIT | ||||
|---|---|---|---|---|---|---|
| Supply Voltage (VDD-GND) | 1.8 | 5.5 | V | |||
| Temperature | –40 | 105 | °C | |||
7.4 Thermal Information
| THERMAL METRIC(1) | TPL5010 | UNIT | |
|---|---|---|---|
| DDC (SOT-23) | |||
| 6 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 163 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 26 | °C/W |
| RθJB | Junction-to-board thermal resistance | 57 | °C/W |
| ψJT | Junction-to-top characterization parameter | 7.5 | °C/W |
| ψJB | Junction-to-board characterization parameter | 57 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).
7.5 Electrical Characteristics(1)
Specifications are for TA= 25°C, VDD-GND = 2.5 V, unless otherwise stated.| PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | ||
|---|---|---|---|---|---|---|---|
| POWER SUPPLY | |||||||
| IDD | Supply current(4) | Operation mode | 35 | 50 | nA | ||
| Digital conversion of external resistance (Rext) | 200 | 400 | µA | ||||
| TIMER | |||||||
| tIP | Time Interval Period | 1650 selectable Time Intervals | Minimum time interval | 100 | ms | ||
| Maximum time interval | 7200 | s | |||||
| Time Interval Setting Accuracy(7) | Excluding the precision of Rext | ±0.6% | |||||
| Timer Interval Setting Accuracy over supply voltage | 1.8 V ≤ VDD ≤ 5.5 V | ±25 | ppm/V | ||||
| tOSC | Oscillator Accuracy | –0.5% | 0.5% | ||||
| Oscillator Accuracy over temperature(5) | –40°C ≤ TA ≤ 105°C | ±100 | ±400 | ppm/°C | |||
| Oscillator Accuracy over supply voltage | 1.8 V ≤ VDD ≤ 5.5 V | ±0.4 | %/V | ||||
| Oscillator Accuracy over life time(6) | 0.24% | ||||||
| tDONE | DONE Pulse width (5) | 100 | ns | ||||
| tRSTn | RSTn Pulse width | 320 | ms | ||||
| tWAKE | WAKE Pulse width | 20 | ms | ||||
| t_Rext | Time to convert Rext | 100 | 120 | ms | |||
| DIGITAL LOGIC LEVELS | |||||||
| VIH | Logic High Threshold DONE pin | 0.7 × VDD | V | ||||
| VIL | Logic Low Threshold DONE pin | 0.3 × VDD | V | ||||
| VOH | Logic output High Level WAKE pin | Iout = 100 µA | VDD – 0.3 | V | |||
| Iout = 1 mA | VDD – 0.7 | V | |||||
| VOL | Logic output Low Level WAKE pin | Iout = -100 µA | 0.3 | V | |||
| Iout = –1 mA | 0.7 | V | |||||
| VOLRSTn | RSTn Logic output Low Level | IOL = –1 mA | 0.3 | V | |||
| IOHRSTn | RSTn High Level output current | VOHRSTn = VDD | 1 | nA | |||
| VIHM_RST | Logic High Threshold DELAY/M_RST pin | 1.5 | V | ||||
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.
(2) Limits are specified by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are specified through correlations using statistical quality control (SQC) method.
(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material.
(4) The supply current excludes load and pullup resistor current. Input pins are at GND or VDD.
(5) This parameter is specified by design and/or characterization and is not tested in production.
(6) Operational life time test procedure equivalent to 10 years.
(7) The accuracy for time interval settings below 1 second is ±100 ms.
7.6 Timing Requirements
| MIN(3) | NOM(4) | MAX(3) | UNIT | ||||
|---|---|---|---|---|---|---|---|
| trRSTn | Rise Time RSTn (2) | Capacitive load 50 pF, Rpullup 100 kΩ | 11 | µs | |||
| tfRSTn | Fall Time RSTn (2) | Capacitive load 50 pF, Rpullup 100 kΩ | 50 | ns | |||
| trWAKE | Rise Time WAKE (2) | Capacitive load 50 pF | 50 | ns | |||
| tfWAKE | Fall Time WAKE (2) | Capacitive load 50 pF | 50 | ns | |||
| tDDONE | DONE to RSTn or WAKE to DONE delay | Minimum delay(1) | 100 | ns | |||
| Maximum delay (1) | tIP-20ms | ms | |||||
| tM_RST | Valid Manual Reset | Observation time 30 ms | 20 | ms | |||
| tDB | De-bounce Manual Reset | 20 | ms | ||||
(1) In case of RSTn from its falling edge, or in case of WAKE from its rising edge.
(2) This parameter is specified by design and/or characterization and is not tested in production.
(3) Limits are specified by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are specified through correlations using statistical quality control (SQC) method.
(4) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material.
Figure 1. TPL5010 Timing 7.7 Typical Characteristics
1.
Figure 4. Oscillator Accuracy vs. VDD 
1.
Figure 5. Oscillator Accuracy vs. Temperature 
| number of observations >20000 | 1s < tIP ≤ 7200s | |
8 Detailed Description
8.1 Overview
The TPL5010 is a system wake-up timer with a watchdog feature designed for low-power applications. The TPL5010 can be used in interrupt-driven applications and provides selectable timing from 100 ms to 7200 s.
8.2 Functional Block Diagram
8.3 Feature Description
The DONE, WAKE and RSTn signals are used to implement the watchdog function. The TPL5010 is programmed to issue a periodic WAKE pulse to a µC which is in sleep or standby mode. After receiving the WAKE pulse, the µC must issue a DONE signal to the TPL5010 at least 20 ms before the rising edge of the next WAKE pulse. If the DONE signal is not asserted, the TPL5010 asserts the RSTn signal to reset the µC. A manual reset function is realized by momentarily pulling the DELAY/M_RST pin to VDD.
Figure 8. Watchdog 