TPS9264x 用于精密调光 LED 驱动器的同步降压控制器

7.3.1 Controlled On-Time Architecture

The control architecture is a combination of valley current control and a one-shot on-timer that varies with input and output voltage. The TPS92640 and TPS92641 devices use a series resistor in the LED path to sense both average LED current and valley inductor current. During the time that the high side NFET is turned on (t_ON), the input voltage charges up the inductor. When it is turned off (t_OFF) and the low side NFET is turned on, the inductor discharges. During both intervals, the current is supplied to the load keeping the LEDs forward biased. Figure 14 shows the inductor current (i_L) waveform for a buck converter operating in continuous conduction mode (CCM). As the system changes input voltage or output voltage, duty cycle D is varied indirectly by changing both t_ON and t_OFF to regulate I_L and ultimately I_LED. For any buck regulator, duty cycle, D, is calculated using Equation 1.

Equation 1.

where

• V_CS is the voltage measured at the CS pin of the IC and η is the estimated or actual converter efficiency.

Figure 14. Ideal CCM Buck Converter Inductor Current I_L Waveform

7.3.2 Switching Frequency

The on-time is determined based on the external resistor (R_ON) connected between RON and VIN pins in combination with a capacitor (C_ON) between RON and GND pins. The input voltage and the R_ON resistor set the current sourced into the R_ON capacitor which governs the ramp speed. The ramp threshold is proportional to scaled down feedback of V_OUT at VOUT pin. The proportionality of V_OUT is set by an external resistor divider (R_VOUT1, R_VOUT2) from V_OUT. The switching frequency, f_SW can be calculated based on on-time and off-time using Equation 2.

Equation 2.

Even though the on-time control is quasi-hysteretic, the input and output voltage proportionality creates a nearly constant switching frequency over the entire operating range. Quasi-hysteretic control minimizes the control loop compensation necessary in many switching regulators, simplifying the design process. It also mitigates current mode instability (also known as sub-harmonic oscillation) found in standard fixed frequency current mode control when operating near or above 50% duty cycle. The inductor current sensing and averaging mechanism in the valley detection control loop provides highly accurate LED current regulation over the entire operating range and temperature.

7.3.3 Average LED Current

Average LED current regulation is set using a sense resistor in series with the LEDs. The internal error-amplifer regulates the voltage across the sense resistor (V_CS) to the IADJ voltage divided by 10. The error amplifier input offset voltage has been minimized using auto-zero calibration technique as shown in . In this chopping scheme, the noninverting and inverting inputs and outputs change polarity every switching cycle to cancel the offset, providing near zero input offset voltage.

Figure 15. Working Principle of the Chopper OTA to Minimize Input Offset Voltage

IADJ can be set to any value up to 2.54 V by connecting it to VREF through a resistor divider for static output current settings. IADJ can also be used to change the regulation point if connected to a controlled voltage source or potentiometer to provide analog dimming. It is also possible to configure IADJ to be used for thermal foldback functions.

Equation 3.

Equation 4.

7.3.4 Analog Dimming and True-Zero Operation

In traditional Buck converters, discontinuous conduction mode (DCM) operation of inductor current results in loss of linearity at low dimming levels and limits the analog dimming range. When using TPS92640 and TPS92641 devices to implement synchronous buck converter, the inductor current is forced to maintain continuous conduction mode (CCM). As a result, it is possible to maintain linearity and achieve true-zero LED current operation with respect to analog dimming command. For true zero application, an external capacitor is required across the LED string to provide a negative current path for the inductor current loop. Figure 16 shows the inductor current (I_L) and output voltage (V_OUT) waveform for a buck converter operating at true zero average current level.

Figure 16. True Zero CCM Buck Converter Inductor Current I_L and Output Voltage V_OUT Waveform

In true zero application (V_IADJ=0 V), there will be a certain amount of I_LED passing the LEDs even though the average inductor current is well-regulated at 0-A set-point. The shaped area in Figure 17 shows the current that will pass through the LED string (i_LED).

Figure 17. Output Current Waveform in True Zero Application with V_IADJ = 0 V

An external resistor, R_OFF as shown in Figure 18 is recommended from V_OUT to CS to shunt the positive current ripple while maintaining the operation of error amplifier to cancel input offset voltage. The shunt current (I_OFF) should be at least half of the output current ripple to ensure proper operation.

Equation 5.

Figure 18. R_OFF for True Zero Application

The resistor R_OFF also impacts the start-up behavior of the circuit as it creates an DC shift in the voltage sensed at CS pin. To ensure proper start-up sequence and monotonic LED current behavior, the voltage V^'_CS should exceed a threshold voltage based on the native offset of the error amplifier before V_OUT exceeding the LED forward voltage, V_LED. Assuming a worst case native off-set (non-chopping) of error amplifier to be less than ±10 mV, the voltage V^'_CS must be greater than this threshold to initiate switching and auto-zero operation. Therefore, R_OFF should be sized to also meet following condition.

Equation 6.

To conclude, an external resistor (R_OFF) from V_OUT to CS pin is required for true zero application, where R_OFF should be:

Equation 7.

7.3.5 Undervoltage Lockout (UVLO)

The UDIM pin of the TPS92640 and TPS92641 devices is a dual function input that features an accurate 1.276-V threshold with programmable hysteresis. This pin functions as both the PWM dimming input of the LEDs and as an input UVLO with built-in hysteresis. When the pin voltage rises and exceeds the 1.276-V threshold, 21 µA (typical) of current is driven out of the UDIM pin into the resistor divider (R_UDIM1, R_UDIM2) providing programmable hysteresis. The UVLO turnon threshold, V_TURN-ON, is defined using Equation 8.

Equation 8.

Once the input voltage is above V_{TURN_ON}, the current source is active and the UVLO hysteresis is determined by Equation 9.

Equation 9.

When using the UDIM pin for UVLO and PWM dimming concurrently, the UVLO circuit can have an extra resistor (R_UDIM3) to set the hysteresis. This allows the standard resistor divider to have smaller values minimizing delays that can incur with additional external PWM dimming circuitry. In general, at least 3 V of hysteresis is preferable when PWM dimming if operating near the UVLO threshold. Under these conditions, the UVLO hysteresis is defined using Equation 10.

Equation 10.

7.3.6 PWM Dimming Using the UDIM Pin

The UDIM pin can be driven with a PWM signal, which controls the synchronous NFET operation. The brightness of the LEDs can be varied by modulating the duty cycle (D_DIM) of this signal using a Schottky diode with anode connected to UDIM pin, as shown in Figure 13.

Figure 19. LED Current During UDIM Pin PWM Dimming

Figure 19 shows the LED current waveform during PWM dimming where duty cycle (D_DIM) is the percentage of the dimming period (T_DIM) that the synchronous NFETs are switching. For the remainder of T_DIM, the NFETs are disabled. The resulting dimmed LED current (I_{DIM_LED}) is:

Equation 11.

7.3.7 External Shunt FET PWM Dimming

Extremely high dimming range and linearity can be achieved by using TPS92641 device for Shunt FET dimming operation with SDIM and SDRV pin. When higher frequency and time resolution PWM dimming signal is applied to the SDIM pin, the SDRV pin provides an inverted signal of the same frequency and duty cycle that can be used to drive the gate of a Shunt NFET directly across the LED load. Because the output voltage will go to near zero when the Shunt NFET is turned on, the internal on-timer at the RON pin will switch to a fixed minimum on-time during the off-time of the dimming cycle. This method keeps the inductor current slewed up and the converter regulating, without the presence of extremely high switching frequencies. During the on-time of the dimming cycle, the converter will switch in its regular fashion with the programmed on-time at the RON pin. An internal resistor pulls the SDIM pin to logic high if left open. In this case, the SDRV driver will be off.

Figure 20. Ideal LED Current During Shunt FET PWM Dimming

Figure 20 shows the ideal LED current waveform during Shunt FET PWM dimming which is very similar to the internal PWM dimming described and shown previously except with much faster rise and fall of the LED current. With this method, only the speed of the parallel Shunt NFET limits the dimming frequency and dimming duty cycle.

7.3.8 VCC Regulation and Start-up

The TPS92640 and TPS92641 devices include a high voltage, low-dropout bias regulator. When power is applied, the regulator is enabled and sources current into an external capacitor (C_VCC) connected to the VCC pin. The recommended bypass capacitance for the VCC regulator is 2.2 µF to 3.3 µF. This capacitor should be rated for 10 V or greater and an X7R dielectric ceramic is recommended. The output of the VCC regulator is monitored by an internal UVLO circuit that protects the device from attempting to operate with insufficient supply voltage, and the supply current is also internally current-limited. When V_IN is close or lower than 8.5 V, the regulator will enter the by-pass mode and the VCC will closely follow V_IN. This linear regulator is the primary heat source generator of the device. The amount of heat generated is a function of input voltage (V_IN), switching frequency (F_SW) and the characteristics of the power MOSFET used. The thermal handling capability of the device imposes a limit on the maximum switching frequency can be used, especially when V_IN is higher than 48 V and high current power MOSFET is used.

7.3.9 Precision Reference

The device includes a precision 3-V reference. This can be used in conjunction with a resistor divider to set voltage levels for the IADJ pin and other external circuitry requiring a reference. It can also be used to supply current to low power micro-controllers. The source current capability from VREF pin is internally limited 2.1 mA. For the VREF regulator, TI recommends a bypass capacitance from 0.1 µF to 1 µF.

7.3.10 Control Loop Compensation

Compensating the TPS92640 and TPS92641 devices is relatively simple for most applications. The only compensation needed is a compensation capacitor, C_COMP across the COMP pin and ground to place a low-frequency dominant pole in the system. The pole must be placed low enough to ensure adequate phase margin at the crossover frequency. For most of the applications, C_COMP of 100 nF to 470 nF is good enough. Additionally, TI recommends a high quality ceramic capacitor with X7R dielectric rated for 25 V.

7.3.11 Overcurrent Protection

The TPS92640 and TPS92641 devices has overcurrent protection to protect the high side NFET (HS-NFET) along with the rest of the system from overcurrent conditions. This peak current limit of 1.28 V (with V_IN = 85 V at room temperature) is sensed across the high side FET R_DS-ON (from SW to VIN). If the threshold is reached or exceeded, HS-NFET will turn off and the low side NFET (LS-NFET) will turn on for approximately 800 ns. Then HS-NFET will turn on again, if the threshold is still reached or exceeded, both FETs are shutoff for 270-µs typical. Figure 21 shows the waveforms of HG and LG under overcurrent protection.

Figure 21. HG and LG Waveforms Under Overcurrent Protection

7.3.12 Overvoltage Protection (OVP)

The TPS92640 and TPS92641 devices have programmable overvoltage protection by using the resistor divider at the VOUT pin. The OVP limit, V_{OVP_ON}, is defined using Equation 12.

Equation 12.

If the output voltage reaches V_{OVP_ON}, the HG, LG and SDRV pins are pulled low to prevent damage to the LEDs or the rest of the circuit. The OVP circuit has a fixed hysteresis of 100 mV before the driver attempts to switch again.

7.3.13 Boot Undervoltage Lockout (UVLO)

The BOOT UVLO circuit is implemented to ensure proper operation of the high-side gate driver under all operating conditions. The switching operation is commenced once the BOOT voltage exceeds 3.4 V above the SW pin. Comparator hysteresis of 1.8 V is included to prevent false tripping due to high-frequency switching noise. When the BOOT falls below the low voltage threshold (1.6 V typical), the high side NFET is disabled by pulling HG pin to SW pin. The next turnon transition of low-side NFET pulls SW pin down and charges the BOOT capacitor (C_BOOT) through VCC. Normal operation is commenced once BOOT capacitor (C_BOOT) is charged above BOOT UVLO turnon threshold of 3.4 V.

The boostrap circuit behavior impacts the circuit behavior near dropout (V_IN= V_OUT) conditions. A minimum off-time is implemented to restrict the maximum duty cycle and maintain charge on the external BOOT capacitor, C_BOOT. As the input voltage, V_IN, approachs close to the output voltage, V_OUT, the output current will fall with the switching frequency, as in conventional Buck regulator. This behavior ensures smooth operation in and out of dropout region while ensuring proper operation of high side gate driver and bootstrap circuit.

7.4.1 Low Power Shutdown Using the UDIM Pin

The TPS92640 and TPS92641 devices can be placed into a low power shutdown mode by grounding the UDIM pin directly (any voltage below 370 mV) for more than 13 ms (typical).

7.4.2 Thermal Shutdown

Internal thermal shutdown circuitry is provided to protect the device in the event that the maximum junction temperature is exceeded. The threshold for thermal shutdown is 165°C with a 20°C hysteresis (both values typical). During thermal shutdown the NFETs and drivers are disabled.

8.1.1 Switching Frequency

Switching frequency is selected based on the trade-offs between efficiency, solution size/cost and the range of output voltage that can be regulated. Many applications place limits on switching frequency due to EMI sensitiviy. The on-time of the TPS92640 and TPS92641 devices can be programmed for switching frequencies ranging from the tens of kHz to over 1 MHz. This on-time varies in proportion to both V_IN and V_OUT, as described in Switching Frequency. However, in practice the switching frequency will shift in response to large swings in input or output voltage. The maximum switching frequency is limited only by the minimum on-time and minimum off-time requirements.

8.1.2 LED Ripple Current

The LED manufacturers generally recommend values of current ripple, ΔI_LED, to achieve optimal optical efficiency. The peak-to-peak current ripple values typically range from ±10% to ±40% of DC current, I_LED. Higher LED ripple current allows the use of smaller inductors, smaller output capacitors, or no output capacitors at all. Lower ripple current requires more inductance, higher switching frequency, or additional output capacitance. Based on the LED current ripple specification and desired switching frequency, the inductor value can be calculated using Equation 13.

Equation 13.

It is important to ensure that the rated inductor saturation current is greater than the worst case operating current (I_LED+ΔI_LED/2) under the wide operating temperature range.

8.1.3 Buck Converters Without Output Capacitor

A Buck regulator is ideal for regulating current because of the direct connection between the inductor and the LED load. Because the current is being regulated, not voltage, a buck current regulator is free of load current transients, and has no need of output capacitance to supply the load and maintain output voltage. This is of great benefit when driving LEDs as large electrolytic capacitors impact the lifetimes and PWM dimming performance. The output capacitor can be eliminated by using a large inductor or higher switching frequency as discussed in LED Ripple Current

A capacitor placed in parallel with the LED or array of LEDs can be used to reduce Δi_LED while keeping the same average current through both the inductor and the LED array. With this topology the inductance can be lowered, making the magnetics smaller and less expensive. Alternatively, the circuit can be run at lower frequency with the same inductor value, improving the efficiency and expanding the range of output voltage that can be regulated.

Figure 22 shows the equivalent impedances presented to the Δi_L-PP when an output capacitor, C_OUT, and its equivalent series resistance (R_ESR) are placed in parallel with the LED array.

Figure 22. LED Ripple Current With C_OUT

To calculate the respective ripple currents, the LED array is represented as the dynamic resistance, (r_D). LED's dynamic resistance is not always specified on the manufacturer’s data sheet, but it can be calculated as the inverse slope of the LED’s V_LED vs I_LED curve at the operating point. However, this method only gives an rough estimate of r_D. Total dynamic resistance for a string of n LEDs connected in series can be calculated as the r_D of one device multiplied by n. Inductor ripple current, Δi_L-PP is still calculated as before. The following equations can then be used to estimate peak-to-peak LED current ripple, Δi_LED-PP, when using a parallel capacitor:

Equation 14.

The calculation for Z_COUT assumes that the shape of the inductor ripple current is approximately sinusoidal. Small values of C_OUT that do not significantly reduce Δi_LED-PP can also be used to control EMI generated by the switching action of the TPS92640 and TPS92641 devices. EMI reduction becomes more important as the length of the connections between the LED and the rest of the circuit increase.

8.1.4 Input Capacitor

Input capacitor is selected using requirements for minimum capacitance and rms ripple current. The input capacitor supply pulses of current approximately equal to I_LED while the high-side NFET is on, and is charged up by the input voltage while the high-side NFET is off. Switching converters such as the TPS92640 and TPS92641 devices have a negative input impedance due to the decrease in input current as input voltage increases. This inverse proportionality of input current to input voltage can cause oscillations (sometimes called power supply interaction) if the magnitude of the negative input impedance is greater than the input filter impedance. Minimum capacitance can be selected by comparing the input impedance to the converter’s negative resistance; however, this requires accurate calculation of the input voltage source inductance and resistance, quantities which can be difficult to determine. An alternative method to select the minimum input capacitance (C_IN-MIN) is to select the maximum voltage ripple (Δv_IN-MAX), which can be tolerated. Δv_IN-MAX is equal to the change in voltage across C_IN during t_ON when it supplies the load current. A good starting point for selection of C_IN is to use an input voltage ripple of 2% to 10% of V_IN. C_IN-MIN can be selected using Equation 15.

Equation 15.

TI recommends a minimum input capacitance at least 75% greater than the C_IN-MIN value. To determine the RMS input current rating (I_IN-RMS), use Equation 16.

Equation 16.

Because this approximation assumes there is no inductor ripple current, the value should be increased by 10-30% depending on the amount of ripple that is expected. Ceramic capacitors are the best choice for the input to the TPS92640 and TPS92641 devices due to their high ripple current rating, low ESR, low cost, and small size compared to other types. When selecting a ceramic capacitor, special attention must be paid to the operating conditions of the application. Ceramic capacitors can lose one-half or more of their capacitance at their rated DC voltage bias and also lose capacitance with extremes in temperature. Make sure to check any recommended deratings and also verify if there is any significant change in capacitance at the operating input voltage and the operating temperature.

8.1.5 NFETs

The TPS92640 and TPS92641 devices require two external NFETs for the switching regulator. The FETs should have a voltage rating at least 20% higher than the maximum input voltage to ensure safe operation during the ringing of the switch node. In practice, all switching converters have some ringing at the switch node due to the diode parasitic capacitance and the lead inductance. The NFETs should also have a current rating at least 50% higher than the average transistor current. Once NFETs are chosen, the power rating is verified by calculating the power loss.

8.2.1 TPS92640: Design Procedure

Figure 23. TPS92640 Design Procedure Schematic

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Set Output Voltage Feedback Ratio

For the desired output (V_OUT), R_VOUT1 and R_VOUT2 is calculated first with the desired feedback voltage, V_VOUT at approximately 2.5 V:

Equation 17.

8.2.1.2.2 Set Switching Frequency

The switching frequency is set as follows:

Equation 18.

8.2.1.2.3 Set Average LED Current

The average LED current (I_LED) is set by:

Equation 19.

8.2.1.2.4 Set Inductor Ripple Current

First, the expected duty cycle, D must be determined:

Equation 20.

With the inductor ripple current, Δi_L-PP specified and the expected duty cycle, the inductance (L) can be chosen:

Equation 21.

8.2.1.2.5 Set LED Ripple Current and Determine Output Capacitance, C_OUT

The LED ripple current (Δi_LED-PP ) is specified. With the target ripple current determined, the output capacitance (C_OUT) can be chosen using Equation 22.

Equation 22.

8.2.1.2.6 Choose N-Channel MOSFETs

The suggested minimum voltage rating, V_T-MAX and current rating, I_T-MAX are:

Equation 23.

Selecting a proper power MOSFET is critical in a power application, other than the SOA limits, the gate characteristic and the R_DSON can affect the system performance seriousely.

Also, the peak current limit (I_LIMIT) is governed by:

Equation 24.

Both the current limit threshold and MOSFET R_DSON are loosely specified and can vary a lot with temperature, input voltage and other operating conditions.

8.2.1.2.7 Choose Input Capacitance

Input capacitance is necessary to provide instantaneous current to the discontinuous portions of the circuit during the high side NFET on-time. The allowable input voltage ripple (Δv_IN-PP) is specified at approximately 3% Pk-Pk of V_IN. The minimum required capacitance (C_{IN_MIN}) to achieve this specification is:

Equation 25.

The necessary RMS input current rating (I_IN-RMS) can be approximated as follows:

Equation 26.

8.2.1.2.8 Set the Turnon Voltage and Undervoltage Lockout Hysteresis

With the desired turnon threshold voltage (V_{TURN_ON}) stated, the resistor divider network composing with R_UDIM1 and R_UDIM2 can be calculated with the equation in below.

Equation 27.

Then R_UDIM3 is optional and recommended for PWM. The R_UDIM3 can be calculated based on Equation 10 to provide the desired undervoltage lockout hysteresis (V_HYS).

8.2.2 TPS92640 – PWM Dimming Application

Figure 24. PWM Dimming Using UDIM Pin Schematic

8.2.2.2 Detailed Design Procedure

8.2.2.2.1 Calculate Operating Points

Calculate the operating points using Equation 28 to Equation 30, and assume approximately 90% conversion efficiency (η = 0.9).

Equation 28.

Equation 29.

Equation 30.

8.2.2.2.2 Output Voltage Feedback

Calculate the VOUT pin resistors by setting R_VOUT2 = 10 kΩ and calculating R_VOUT1.

Equation 31.

Choose R_VOUT1 = 120 kΩ.

8.2.2.2.3 Switching Frequency

Using the values calculated above choose a value of C_ON = 1 nF and calculate the value of R_ON:

Equation 32.

Choose the closest standard resistor value of R_ON = 26.1 kΩ.

8.2.2.2.4 Set the Feedback Reference and LED Current

To get a value of V_CS = 200 mV V_IADJ must be set to 2 V. Choose a value of R_IADJ1 = 10 kΩ and solve for R_IADJ2:

Equation 33.

Choose the standard resistor value of R_IADJ2 = 19.6 kΩ and solve for R_CS using Equation 34.

Equation 34.

R_CS = 0.2 Ω is a standard resistor value.

8.2.2.2.5 Calculate the Inductor Value

Because this is a PWM dimming application, TI does not recommend much output capacitance for faster current rise and fall times, so the inductor ripple current should be close to the 300-mA peak-to-peak LED ripple current. Calculate and inductor value that will give you 350-mA peak-to-peak inductor ripple current or less:

Equation 35.

Choose the standard value of L = 68 µH which results in an actual Δi_L-PP of 342 mA.

8.2.2.2.6 Calculate the Output Capacitor Value

Given the actual inductor ripple current of 342-mA peak-to-peak, use Equation 36 to calculate the required output capacitor value.

Equation 36.

Choose C_OUT = 0.1 µF.

8.2.2.2.7 Calculate the MOSFET Parameters

The MOSFETs must have a minimum voltage and current rating for the application. The minimum ratings are calculated using Equation 37 and Equation 38.

Equation 37.

Equation 38.

Choose MOSFETs that have a drain-to-source voltage rating of greater than 63 V and a current rating greater than 1.26 A.

8.2.2.2.8 Calculate the Minimum Input Capacitance

The minimum input capacitance to achieve 1.5-V peak-to-peak input voltage ripple is calculated using Equation 39.

Equation 39.

For PWM dimming applications more input voltage ripple will be present at the PWM dimming frequency. For these applications, TI recommends using 10 times the amount of minimum input capacitance or more. Choose C_IN = 10 µF.

8.2.2.2.9 Undervoltage Lockout and Hysteresis

Choose a value of R_UDIM1 = 100 kΩ and calculate the values of R_UDIM2 and R_UDIM3 using Equation 40 and Equation 41.

Equation 40.

Equation 41.

Choose the nearest standard resistor values of R_UDIM2 = 3.32 kΩ and R_UDIM3 = 19.1 kΩ.

8.2.2.3 Application Curve

Figure 25. UDIM Dimming Waveform