8.7 Pullable Crystal Characteristics (SECREF_P, SECREF_N)(1)(2)(3)(4)
VDD_IN / VDD_PLL1 / VDD_PLL2 / VDD_DIG = 3.3 V ± 5%, VDDO_x = 1.8 V ± 5%, 2.5 V ± 5%, 3.3 V ± 5%, TA = –40°C to 85°C
PARAMETER |
TEST CONDITIONS |
MIN |
TYP |
MAX |
UNIT |
fXTAL
|
Crystal Frequency |
Fundamental Mode |
10 |
|
52 |
MHz |
ESR |
Equivalent Series Resistance |
fXTAL = 10 MHz to 16 MHz |
|
|
60 |
Ω |
fXTAL = 16 MHz to 30 MHz |
|
|
50 |
fXTAL = 30 MHz to 52 MHz |
|
|
30 |
CL
|
Load Capacitance |
Recommended Crystal specifications |
|
9 |
|
pF |
C0
|
Shunt Capacitance |
|
2.1 |
|
pF |
C0/C1
|
Shunt capacitance to motional capacitance ratio |
|
220 |
250 |
|
PXTAL
|
Crystal Max Drive Level |
|
|
300 |
µW |
CXO
|
On-Chip XO Input Capacitance at SECREF_P and SECREF_N |
Single-ended, each pin referenced to GND |
14 |
|
24 |
pF |
Trim |
Trim Sensitivity |
CL = 9 pF, fXTAL = 50 MHz |
|
25 |
|
ppm/pF |
CL = 9 pF, fXTAL = 25 MHz |
|
35 |
|
Con-chip-5p-load
|
On-chip tunable capacitor variation over VT across crystal load of 5 pF |
Frequency accuracy of crystal over temperature, aging and initial accuracy ≤ ±25 ppm. |
|
|
450 |
fF |
Con-chip-12p-load
|
On-chip tunable capacitor variation over VT across crystal load of 12 pF |
Frequency accuracy of crystal over temperature, aging and initial accuracy ≤ ±25 ppm. |
|
|
1.5 |
pF |
fPR
|
Pulling range |
C0/C1< 250 |
|
±50 |
|
ppm |
(1) Parameter is specified by characterization and is not tested in production.
(2) The crystal pullability ratio is considered in the case where the XO frequency margining option is enabled. The actual pull range depends on the crystal pullability, as well as on-chip capacitance (Con-chip), device crystal oscillator input capacitance (CXO), PCB stray capacitance (CPCB), and any installed on-board tuning capacitance (CTUNE). Trim Sensitivity or Pullability (ppm/pF), TS = C1 × 1e6 / [2 × (C0 + CL)2]. If the total external capacitance is less than the crystal CL, the crystal will oscillate at a higher frequency than the nominal crystal frequency. If the total external capacitance is higher than CL, the crystal will oscillate at a lower frequency than nominal.
(3) Using a crystal with higher ESR can degrade output phase noise and may impact crystal start-up.
(4) Verified with crystals specified for a load capacitance of CL = 9 pF. PCB stray capacitance was measured to be 1 pF. Crystals tested: 19.2-MHz TXC (Part Number: 7M19272001), 19.44-MHz TXC (Part Number: 7M19472001), 25-MHz TXC (Part Number: 7M25072001), 38.88-MHz TXC (Part Number: 7M38872001), 49.152-MHz TXC (Part Number: 7M49172001), 50-MHz TXC (Part Number: 7M50072001).