ZHCSDH0C
December 2014 – January 2018
LP3907-Q1
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
典型应用电路
4
修订历史记录
5
器件比较 台式机
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions (Bucks)
7.4
Thermal Information
7.5
General Electrical Characteristics
7.6
Low Dropout Regulators, LDO1 And LDO2
7.7
Buck Converters SW1, SW2
7.8
I/O Electrical Characteristics
7.9
Power-On Reset (POR) Threshold/Function
7.10
I2C Interface Timing Requirements
7.11
Typical Characteristics — LDO
7.12
Typical Characteristics — Bucks
7.13
Typical Characteristics — Buck1
7.14
Typical Characteristics — Buck2
7.15
Typical Characteristics — Bucks
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
DC-DC Converters
8.3.1.1
Linear Low Dropout Regulators (LDOs)
8.3.1.2
No-Load Stability
8.3.1.3
LDO and LDO2 Control Registers
8.3.2
SW1, SW2: Synchronous Step-Down Magnetic DC-DC Converters
8.3.2.1
Functional Description
8.3.2.2
Circuit Operation Description
8.3.2.3
PWM Operation
8.3.2.4
Internal Synchronous Rectification
8.3.2.5
Current Limiting
8.3.2.6
PFM Operation
8.3.2.7
SW1, SW2 Operation
8.3.2.8
SW1, SW2 Control Registers
8.3.2.9
Soft Start
8.3.2.10
Low Dropout Operation
8.3.2.11
Flexible Power Sequencing of Multiple Power Supplies
8.3.2.12
Power-Up Sequencing Using the EN_T Function
8.3.3
Flexible Power-On Reset (Power Good with Delay)
8.3.4
Undervoltage Lockout
8.4
Device Functional Modes
8.4.1
Shutdown Mode
8.5
Programming
8.5.1
I2C-Compatible Serial Interface
8.5.1.1
I2C Signals
8.5.1.2
I2C Data Validity
8.5.1.3
I2C Start and Stop Conditions
8.5.1.4
Transferring Data
8.5.2
Factory Programmable Options
8.6
Register Maps
8.6.1
LP3907-Q1 Control Registers
8.6.1.1
Interrupt Status Register (ISRA) 0x02
8.6.1.2
Control 1 Register (SCR1) 0x07
8.6.1.3
EN_DLY Preset Delay Sequence After EN_T Assertion
8.6.1.4
Buck and LDO Output Voltage Enable Register (BKLDOEN) – 0x10
8.6.1.5
Buck and LDO Status Register (BKLDOSR) – 0x11
8.6.1.6
Buck Voltage Change Control Register 1 (VCCR) – 0x20
8.6.1.7
Buck1 Target Voltage 1 Register (B1TV1) – 0x23
8.6.1.8
Buck1 Target Voltage 2 Register (B1TV2) – 0x24
8.6.1.9
Buck1 Ramp Control Register (B1RC) - 0x25
8.6.1.10
Buck2 Target Voltage 1 Register (B2TV1) – 0x29
8.6.1.11
Buck2 Target Voltage 2 Register (B2TV2) – 0x2A
8.6.1.12
Buck2 Ramp Control Register (B2RC) - 0x2B
8.6.1.13
Buck Function Register (BFCR) – 0x38
8.6.1.14
LDO1 Control Register (LDO1VCR) – 0x39
8.6.1.15
LDO2 Control Register (LDO2VCR) – 0x3A
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Component Selection
9.2.2.1.1
Inductors for SW1 And SW2
9.2.2.1.1.1
Method 1:
9.2.2.1.1.2
Method 2:
9.2.2.1.2
External Capacitors
9.2.2.2
LDO Capacitor Selection
9.2.2.2.1
Input Capacitor
9.2.2.2.2
Output Capacitor
9.2.2.2.3
Capacitor Characteristics
9.2.2.2.4
Input Capacitor Selection for SW1 And SW2
9.2.2.2.5
Output Capacitor Selection for SW1, SW2
9.2.2.2.6
I2C Pullup Resistor
9.2.2.3
Operation Without I2C Interface
9.2.2.3.1
High VIN High-Load Operation
9.2.2.3.2
Junction Temperature
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Analog Power Signal Routing
11
Layout
11.1
DSBGA Layout Guidelines
11.2
Layout Example
11.3
Thermal Considerations of WQFN Package
12
器件和文档支持
12.1
文档支持
12.1.1
相关文档
12.2
商标
12.3
接收文档更新通知
12.4
社区资源
12.5
静电放电警告
12.6
Glossary
13
机械、封装和可订购信息
1
特性
符合汽车应用要求
具有符合 AEC Q100 的下列结果:
器件温度等级 1:环境工作温度范围为 –40°C 至 +125°C
输入电压范围:2.8V 至 5.5V
兼容高级 应用 处理器和现场可编程门阵列 (FPGA)
2 个低压降线性稳压器 (LDO),用于为内部处理器的运行和 I/O 供电
高速串行接口用于对器件功能和设置进行独立控制
精密的内部基准电压
热过载保护
电流过载保护
软件可编程稳压器
针对 Buck1 和 Buck2 的外部上电复位功能(带延迟功能的电源正常指示)
配有欠压闭锁检测器,用于监视输入电源电压
降压直流/直流转换器(降压)
可编程 V
OUT
:
Buck1:1A 时为 0.8V 至 2V
Buck2:600mA 时为 1V 至 3.5V
效率高达 96%
2.1MHz 脉冲宽度调制 (PWM) 开关频率
低负载条件下
从 PWM 模式自动切换到脉冲频率调制 (PFM) 模式
±3% 的输出电压精度
自动软启动
线性稳压器 (LDO)
可编程 V
OUT
1V 至 3.5V
300mA 输出电流
30mV(典型值)压降