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  • DRV1098312V 至 24V 三相无传感器 BLDC 电机驱动器

    • ZHCSDA7G July   2014  – February 2018 DRV10983

      PRODUCTION DATA.  

  • CONTENTS
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  • DRV1098312V 至 24V 三相无传感器 BLDC 电机驱动器
  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      应用电路原理图
  4. 4 修订历史记录
  5. 5 说明 (续)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Regulators
        1. 8.3.1.1 Step-Down Regulator
        2. 8.3.1.2 3.3-V and 1.8-V LDO
      2. 8.3.2 Protection Circuits
        1. 8.3.2.1 Thermal Shutdown
        2. 8.3.2.2 Undervoltage Lockout (UVLO)
        3. 8.3.2.3 Overcurrent Protection (OCP)
        4. 8.3.2.4 Lock
      3. 8.3.3 Motor Speed Control
      4. 8.3.4 Sleep or Standby Condition
      5. 8.3.5 Non-Volatile Memory
    4. 8.4 Device Functional Modes
      1. 8.4.1  Motor Parameters
        1. 8.4.1.1 Motor Phase Resistance
        2. 8.4.1.2 BEMF Constant
      2. 8.4.2  Starting the Motor Under Different Initial Conditions
        1. 8.4.2.1 Case 1 – Motor Is Stationary
        2. 8.4.2.2 Case 2 – Motor Is Spinning in the Forward Direction
        3. 8.4.2.3 Case 3 – Motor Is Spinning in the Reverse Direction
      3. 8.4.3  Motor Start Sequence
        1. 8.4.3.1 ISD
        2. 8.4.3.2 Motor Resynchronization
        3. 8.4.3.3 Reverse Drive
        4. 8.4.3.4 Motor Brake
        5. 8.4.3.5 Motor Initialization
          1. 8.4.3.5.1 Align
          2. 8.4.3.5.2 Initial Position Detect (IPD)
            1. 8.4.3.5.2.1 IPD Operation
            2. 8.4.3.5.2.2 IPD Release Mode
            3. 8.4.3.5.2.3 IPD Advance Angle
          3. 8.4.3.5.3 Motor Start
        6. 8.4.3.6 Start-Up Timing
      4. 8.4.4  Start-Up Current Setting
        1. 8.4.4.1 Start-Up Current Ramp-Up
      5. 8.4.5  Closed Loop
        1. 8.4.5.1 Half Cycle Control and Full Cycle Control
        2. 8.4.5.2 Analog Mode Speed Control
        3. 8.4.5.3 Digital PWM Input Mode Speed Control
        4. 8.4.5.4 I2C Mode Speed Control
        5. 8.4.5.5 Closed Loop Accelerate
        6. 8.4.5.6 Control Coefficient
        7. 8.4.5.7 Commutation Control Advance Angle
      6. 8.4.6  Current Limit
        1. 8.4.6.1 Acceleration Current Limit
      7. 8.4.7  Lock Detect and Fault Handling
        1. 8.4.7.1 Lock0: Lock Detection Current Limit Triggered
        2. 8.4.7.2 Lock1: Abnormal Speed
        3. 8.4.7.3 Lock2: Abnormal Kt
        4. 8.4.7.4 Lock3 (Fault3): No Motor Fault
        5. 8.4.7.5 Lock4: Open Loop Motor Stuck Lock
        6. 8.4.7.6 Lock5: Closed Loop Motor Stuck Lock
      8. 8.4.8  AVS Function
        1. 8.4.8.1 Mechanical AVS Function
      9. 8.4.9  PWM Output
      10. 8.4.10 FG Customized Configuration
        1. 8.4.10.1 FG Output Frequency
        2. 8.4.10.2 FG Open-Loop and Lock Behavior
      11. 8.4.11 Diagnostics and Visibility
        1. 8.4.11.1 Motor Status Readback
        2. 8.4.11.2 Motor Speed Readback
          1. 8.4.11.2.1 Two-Byte Register Readback
        3. 8.4.11.3 Motor Electrical Period Readback
        4. 8.4.11.4 BEMF Constant Readback
        5. 8.4.11.5 Motor Estimated Position by IPD
        6. 8.4.11.6 Supply Voltage Readback
        7. 8.4.11.7 Speed Command Readback
        8. 8.4.11.8 Speed Command Buffer Readback
        9. 8.4.11.9 Fault Diagnostics
    5. 8.5 Register Maps
      1. 8.5.1 I2C Serial Interface
      2. 8.5.2 Register Map
      3. 8.5.3 Register Definition
        1. Table 9. Register Description
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 文档支持
      1. 12.2.1 相关文档
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 接收文档更新通知
    6. 12.6 社区资源
    7. 12.7 Glossary
  13. 13机械、封装和可订购信息
  14. 重要声明
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DATA SHEET

DRV1098312V 至 24V 三相无传感器 BLDC 电机驱动器

本资源的原文使用英文撰写。 为方便起见,TI 提供了译文;由于翻译过程中可能使用了自动化工具,TI 不保证译文的准确性。 为确认准确性,请务必访问 ti.com 参考最新的英文版本(控制文档)。

1 特性

  • 输入电压范围:8 至 28V
  • 总驱动器 H + L rDS(on):250mΩ
  • 驱动电流:2A 持续绕组电流(峰值 3A)
  • 无传感器专有反电动势 (BEMF) 控制方案
  • 连续正弦 180° 换向
  • 无需外部感测电阻
  • 用户可通过添加外部感应电阻以灵活监视为电机提供的功率
  • 灵活的用户接口选项:
    • I2C 接口:访问命令和反馈寄存器
    • 专用的 SPEED 引脚:接受模拟或 PWM 输入
    • 专用的 FG 引脚:提供 TACH 反馈
    • 可通过 EEPROM 定制旋转曲线
    • 使用 DIR 引脚进行正向/反向控制
  • 集成了降压稳压器,可高效地为内部和外部电路提供电压 (5V 或 3.3V)
  • 电源电流为 3mA 待机型号 (DRV10983)
  • 电源电流为 180 μA 睡眠型号 (DRV10983Z)
  • 过流保护
  • 锁定检测
  • 电压浪涌保护
  • 欠压闭锁 (UVLO) 保护
  • 热关断保护
  • 耐热增强型 24 引脚散热薄型小外形尺寸 (HTSSOP)

2 应用

  • 设备风扇
  • 制热、通风与空调控制 (HVAC)

3 说明

DRV10983 器件是一款具有集成功率 MOSFET 的三相无传感器电机驱动器,可提供高达 2A 的持续驱动电流。该器件专为成本敏感型、低噪声、低外部组件数量 应用而设计低功耗是一个关键问题。

DRV10983 器件采用专有无传感器控制方案来提供持续正弦驱动,可大幅降低换向过程中通常会产生的纯音。该器件的接口设计简单而灵活。可直接通过 PWM、模拟、或 I2C 输入控制电机。可通过 FG 引脚或 I2C 提供电机速度反馈。

DRV10983器件 安全功能包括 一个集成降压稳压器,可高效地将电源电压降至 5V 或 3.3V,从而为内外部电路供电。该器件提供睡眠模式和待机模式两种型号,可在电机停止运转时实现节能。待机模式 (3mA) 型号会使稳压器保持运行,而休眠模式 (180μA) 型号会使稳压器停止工作。在使用稳压器 为外部 微控制器供电的应用中使用待机模式型号。

器件信息(1)

器件型号 封装 封装尺寸(标称值)
DRV10983 散热薄型小外形尺寸封装 (HTSSOP) (24) 7.80mm × 6.40mm
DRV10983Z
  1. 要了解所有可用封装,请参阅数据表末尾的可订购产品附录。

Device Images

应用电路原理图

DRV10983 DRV10983Z typ-app-83_SLVSCP6.gif

4 修订历史记录

Changes from F Revision (December 2017) to G Revision

  • Added timing information for entering and exiting sleep mode and standby modeGo
  • Added BEMF COMPARATOR hysteresis specificationGo
  • Updated Start the Motor Under Different Initial Conditions figureGo
  • Changed the default value for register address 0x27 from 0xFC to 0xF4 in the Default EEPROM Value tableGo
  • Deleted the "TI recommends..." sentence from the description for address 0x27, bit 3Go
  • Added constraints to recommended external inductorGo

Changes from E Revision (May 2017) to F Revision

  • Added the internal SPEED pin pulldown resistance to ground parameter to the Electrical Characteristics tableGo
  • Changed the Step-Down Regulator sectionGo
  • Updated the Motor Phase Resistance sectionGo
  • Deleted the Inductive AVS Function sectionGo
  • Changed the default value for register address 0x29 from 0xB7 to 0xB9 in the Default EEPROM Value tableGo
  • Added application information for the sleep mode device Go

Changes from D Revision (May 2017) to E Revision

  • Changed pin numbering in the Pin Functions table Go

Changes from C Revision (May 2016) to D Revision

  • 在数据表标题和器件信息表中添加了 DRV10983Z 器件型号Go
  • Added DRV10983Z part numberGo
  • Corrected the link to the DRV10983 and DRV10975 Tuning GuideGo
  • Added text to the PWM Output sectionGo
  • Changed Figure 37Go
  • Changed "FGOLSet[1:0]" to "FGOLsel[1:0]" in Register Map address 0x2BGo
  • Added recommended minimum dead time to SysOpt7 registerGo
  • Added External Components table Go
  • Changed the link to the DRV10983 and DRV10975 Tuning GuideGo
  • Changed the layout exampleGo

Changes from B Revision (February 2015) to C Revision

  • Added "phase to phase" clarification for overcurrent protectionGo
  • Added more accurate description to clarify overcurrent protection operationGo

Changes from A Revision (October 2014) to B Revision

  • 更新了数据表以包含 DRV10983Z 睡眠型号Go

Changes from * Revision (July 2014) to A Revision

  • 更新了输入电压范围:8V 至 28VGo
  • 删除了 DRV10983Z 睡眠型号部分并更新了待机模式电源电流Go
  • Updated pin information for SW, SWGND, VREG, SDA, FG, and VCC pinsGo
  • Added DIR, SW, and VREG pins to Absolute Maximum RatingsGo
  • Updated max supply voltage and voltage range ratings for VCC and U, V, W in Recommended Operating ConditionsGo
  • changed Functional Block DiagramGo
  • Changed "hardware current limit" to "lock detection current limit" and "software current" to "acceleration current limit" throughout data sheetGo
  • Updated max value for open to closed loop threshold Go
  • Corrected description to "velocity constant of the motor" for Equation 2Go
  • Corrected register name in Start-Up Current SettingGo
  • Updated Equation 3Go
  • Updated Figure 20Go
  • Updated caption name for Figure 24Go
  • Corrected max speed command setting for SpdCtrl[8:0] Go
  • Updated register description for status register. Go
  • Updated the data in the examples for MotorSpeed1 and MotorPeriod1 Go
  • Updated IPDPosition description in Register MapGo
  • Increased max motor voltage for Recommended Application Range Go
  • Updated graph callout for Figure 41Go

5 说明 (续)

用户可通过 I2C 接口对寄存器中的特定电机参数进行重新编程并可对 EEPROM 进行编程,以帮助优化既定应用的性能。DRV10983 器件采用带有外露散热焊盘的高效散热型 HTSSOP 24 引脚封装。额定工作温度为 –40°C 至 125°C。

6 Pin Configuration and Functions

PWP PowerPAD™ Package
24-Pin HTSSOP
Top View

Pin Functions

PIN TYPE(1) DESCRIPTION
NAME NO.
VCP 1 P Charge pump output.
CPN 3 P Charge pump pin 1, use a ceramic capacitor between CPN and CPP.
CPP 2 P Charge pump pin 2, use a ceramic capacitor between CPN and CPP.
DIR 14 I Direction
FG 12 O FG signal output.
GND 8 — Digital and analog ground
PGND 15, 16 — Power ground
SCL 10 I I2C clock signal
SDA 11 I/O I2C data signal
SPEED 13 I Speed control signal for PWM or analog input speed command
SW 4 O Step-down regulator switching node output
SWGND 5 P Step-down regulator ground
U 17, 18 O Motor U phase
V 19, 20 O Motor V phase
V1P8 7 P Internal 1.8-V digital core voltage. V1P8 capacitor must connect to GND. This is an output, but not specified to drive external loads.
V3P3 9 P Internal 3.3-V supply voltage. V3P3 capacitor must connect to GND. This is an output and may drive external loads not to exceed IV3P3_MAX.
VCC 23, 24 P Device power supply
VREG 6 P Step-down regulator output and feedback point
W 21, 22 O Motor W phase
thermal pad (GND) — — The exposed thermal pad must be electrically connected to ground plane through soldering to PCB for proper operation and connected to bottom side of PCB through vias for better thermal spreading.
(1) I = input, O = output, I/O = input/output, P = power

7 Specifications

7.1 Absolute Maximum Ratings

over operating ambient temperature (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage(2) VCC –0.3 30 V
SPEED –0.3 4
GND –0.3 0.3
SCL, SDA –0.3 4
DIR –0.3 4
Output voltage(2) U, V, W –1 30 V
SW –1 30
VREG –0.3 7
FG –0.3 4
VCP –0.3 V(VCC) + 6
CPN –0.3 30
CPP –0.3 V(VCC) + 6
V3P3 –0.3 4
V1P8 –0.3 2.5
Maximum junction temperature, TJ_MAX –40 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal unless otherwise noted.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2500 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage VCC 8 24 28 V
Voltage U, V, W –0.7 29 V
SCL, SDA, FG, SPEED, DIR –0.1 3.3 3.6
PGND, GND –0.1 0.1
Current Step-down regulator output current (buck mode) 100 mA
Step-down regulator output current (linear mode) 0
V3P3 LDO output current 5
Operating junction temperature, TJ –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) DRV10983, DRV10983Z UNIT
PWP (HTSSOP)
24 PINS
RθJA Junction-to-ambient thermal resistance 36.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 17.4 °C/W
RθJB Junction-to-board thermal resistance 14.8 °C/W
ψJT Junction-to-top characterization parameter 0.4 °C/W
ψJB Junction-to-board characterization parameter 14.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

over operating ambient temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT (DRV10983)
IVcc Supply current TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; buck regulator
3.5 5 mA
TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; linear regulator
11
IVccSTBY Standby current TA = 25°C; SPEED = 0 V; V(VCC) = 24 V;
standby mode device; buck regulator
3 4 mA
TA = 25°C; SPEED = 0 V; V(VCC) = 24 V;
standby mode device; linear regulator
9
SUPPLY CURRENT (DRV10983Z)
IVcc Supply current TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; buck regulator
3.5 5 mA
TA = 25°C; sleepDis = 1; SPEED = 0 V;
V(VCC) = 24 V; linear regulator
11
IVccSLEEP Sleep current TA = 25°C; SPEED = 0 V; V(VCC) = 24 V;
sleep mode device; buck regulator
160 200 µA
UVLO
VUVLO_R UVLO threshold voltage Rise threshold, TA = 25°C 7 7.4 8 V
VUVLO_F UVLO threshold voltage Fall threshold, TA = 25°C 6.7 7.1 7.5 V
VUVLO_HYS UVLO threshold voltage hysteresis TA = 25°C 200 300 400 mV
LDO OUTPUT
V3P3 V(VCC) = 24 V, TA = 25°C, VregSel = 0,
5-mA load
3 3.3 3.6 V
V(VCC) = 24 V, TA = 25°C, VregSel = 1,
V(VREG)< 3.3 V, 5-mA load
V(VREG) – 0.3 V(VREG) – 0.1 V(VREG)
V(VCC) = 24 V, TA = 25°C, VregSel = 1,
V(VREG) ≥ 3.3 V, 5-mA load
3 3.3 3.6
IV3P3_MAX Maximum load from V3P3 V(VCC) = 24 V, TA = 25°C 5 mA
V1P8 V(VCC) = 24 V, TA = 25°C, VregSel = 0 1.6 1.78 2 V
V(VCC) = 24 V, TA = 25°C, VregSel = 1 1.6 1.78 2
STEP-DOWN REGULATOR
VREG Regulator output voltage TA = 25˚C; VregSel = 0, LSW = 47 µH,
CSW = 10 µF, Iload = 50 mA
4.5 5 5.5 V
TA = 25˚C; VregSel = 1, LSW = 47 µH,
CSW = 10 µF, Iload = 50 mA
3.06 3.4 3.6
VREG_L Regulator output voltage (linear mode) TA = 25°C, VregSel = 0, RSW = 39 Ω, CSW = 10 µF 5 V
TA = 25°C, VregSel = 1, RSW = 39 Ω, CSW = 10 µF 3.4
IREG_MAX Maximum load from VREG TA = 25°C, LSW = 47 µH, CSW = 10 µF 100 mA
INTEGRATED MOSFET
rDS(on) Series resistance (H + L) TA = 25˚C; V(VCC) = 24 V; V(VCP) = 29 V;
Iout = 1 A
0.25 0.4 Ω
TA = 85˚C; V(VCC) = 24 V; V(VCP) = 29 V;
Iout = 1 A
0.325
SPEED – ANALOG MODE
VAN/A_FS Analog full speed voltage V(V3P3) × 0.9 V
VAN/A_ZS Analog zero speed voltage 100 mV
tSAM Analog speed sample period 320 µs
VAN/A_RES Analog voltage resolution 5.8 mV
SPEED – PWM DIGITAL MODE
VDIG_IH PWM input high voltage 2.2 V
VDIG_IL PWM input low voltage 0.6 V
ƒPWM PWM input frequency 1 100 kHz
STANDBY MODE (DRV10983)
VEN_SB Analog voltage-to-enter standby mode SpdCtrlMd = 0 (analog mode) 30 mV
VEX_SB Analog voltage-to-exit standby SpdCtrlMd = 0 (analog mode) 120 mV
tEX_SB_ANA Time-to-exit from standby mode SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SB
700 ms
tEX_SB_DR_ANA Time taken to drive motor after exiting from standby mode SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SL; ISDen = 0; BrkDoneThr[2:0] = 0
1 µs
tEX_SB_PWM Time-to-exit from standby mode SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH
1 µs
tEX_SB_DR_PWM Time taken to drive motor after exiting from standby mode SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0
55 ms
tEN_SB_ANA Time-to-enter sleep mode SpdCtrlMd = 0 (analog mode)
SPEED < VEN_SL; AvSIndEn = 0
5 ms
tEN_SB_PWM Time-to-enter sleep mode SpdCtrlMd = 1 (PMW mode)
SPEED < VDIG_IL; AvSIndEn = 0
60 ms
SLEEP MODE (DRV10983Z)
VEN_SL Analog voltage-to-enter sleep SpdCtrlMd = 0 (analog mode) 30 mV
VEX_SL Analog voltage-to-exit sleep SpdCtrlMd = 0 (analog mode) 2.2 3.3 V
tEX_SL_ANA Time-to-exit from sleep mode SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SL
1 µs
tEX_SL_DR_ANA Time taken to drive motor after exiting from sleep mode SpdCtrlMd = 0 (analog mode)
SPEED > VEX_SL; ISDen = 0; BrkDoneThr[2:0] = 0
350 µs
tEX_SL_PWM Time-to-exit from sleep mode SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH
1 µs
tEX_SL_DR_PWM Time taken to drive motor after exiting from sleep mode SpdCtrlMd = 1 (PWM mode)
SPEED > VDIG_IH; ISDen = 0; BrkDoneThr[2:0] = 0
350 ms
tEN_SL_ANA Time-to-enter sleep mode SpdCtrlMd = 0 (analog mode)
SPEED < VEN_SL; AvSIndEn = 0
5.2 ms
tEN_SL_PWM Time-to-enter sleep mode SpdCtrlMd = 1 (PMW mode)
SPEED < VDIG_IL; AvSIndEn = 0
58 ms
RPD_SPEED_SL Internal SPEED pin pulldown resistance to ground VSPEED = 0 (sleep mode) 55 kΩ
DIGITAL I/O (DIR INPUT AND FG OUTPUT)
VDIR_H Input high 2.2 V
VDIR_L Input low 0.6 V
IFG_SINK Output sink current Vout = 0.3 V 5 mA
I2C SERIAL INTERFACE
VI2C_H Input high 2.2 V
VI2C_L Input low 0.6 V
LOCK DETECTION RELEASE TIME
tLOCK_OFF Lock release time 5 s
tLCK_ETR Lock enter time 0.3 s
OVERCURRENT PROTECTION
IOC_limit Overcurrent protection TA = 25˚C; phase to phase 3 4 A
THERMAL SHUTDOWN
TSDN Shutdown temperature threshold Shutdown temperature 150 °C
TSDN_HYS Shutdown temperature threshold Hysteresis 10 °C
BEMF COMPARATOR
BEMFHYS BEMF comparator hysteresis bemfHsyEn = 1 50 mV

7.6 Typical Characteristics

DRV10983 DRV10983Z D001_SLVSCP6.gif
Figure 1. Supply Current vs Power Supply
DRV10983 DRV10983Z D004_SLVSCP6.gif
Figure 3. Step-down Regulator Output vs Power Supply
(VregSel = 1)
DRV10983 DRV10983Z D002_SLVSCP6.gif
Figure 2. Step-down Regulator Output vs Power Supply
(VregSel = 0)

8 Detailed Description

8.1 Overview

The DRV10983 is a three-phase sensorless motor driver with integrated power MOSFETs, which provide drive current capability up to 2 A continuous. The device is specifically designed for low-noise, low external component count, 12- to 24-V motor drive applications. The device is configurable through a simple I2C interface to accommodate different motor parameters and spin-up profiles for different customer applications.

A 180° sensorless control scheme provides continuous sinusoidal output voltages to the motor phases to enable ultra-quiet motor operation by keeping the electrically induced torque ripple small.

The DRV10983 features extensive protection and fault detect mechanisms to ensure reliable operation. Voltage surge protection prevents the input Vcc capacitor from overcharging, which is typical during motor deceleration. The devices provides phase to phase overcurrent protection without the need for an external current sense resistor. Rotor lock detect is available through several methods. These methods can be configured with register settings to ensure reliable operation. The device provides additional protection for undervoltage lockout (UVLO) and for thermal shutdown.

The commutation control algorithm continuously measures the motor phase current and periodically measures the VCC supply voltage. The device uses this information for BEMF estimation, and the information is also provided through the I2C register interface for debug and diagnostic use in the system, if desired.

A buck step-down regulator efficiently steps down the supply voltage. The output of this regulator provides power for the internal circuits and can also be used to provide power for an external circuit such as a microcontroller. If providing power for an external circuit is not necessary (and to reduce system cost), configure the buck step-down regulator as a linear regulator by replacing the inductor with resistor.

TI designed the interfacing to the DRV10983 to be flexible. In addition to the I2C interface, the system can use the discrete FG pin, DIR pin, and SPEED pin. SPEED is the speed command input pin. It controls the output voltage amplitude. DIR is the direction control input pin. FG is the speed indicator output, which shows the frequency of the motor commutation.

EEPROM is integrated in the DRV10983 as memory for the motor parameter and operation settings. EEPROM data transfers to the register after power on and exit from sleep mode.

The DRV10983 device can also operate in register mode. If the system includes a microcontroller communicating through the I2C interface, the device can dynamically update the motor parameter and operation settings by writing to the registers. In this configuration, the EEPROM data is bypassed by the register settings.

8.2 Functional Block Diagram

DRV10983 DRV10983Z fbd_LVSCP2.gif

 

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