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  • TPDxE05U06 适用于超高速（最高可达 6Gbps）接口的单通道、4 通道、6 通道静电放电 (ESD) 保护器件

    • ZHCSAK3O December   2012  – August 2024 TPD1E05U06 , TPD4E05U06 , TPD6E05U06

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  • TPDxE05U06 适用于超高速（最高可达 6Gbps）接口的单通道、4 通道、6 通道静电放电 (ESD) 保护器件
  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1.     Absolute Maximum Ratings
    2. 5.1 ESD Ratings—JEDEC Specification
    3. 5.2 ESD Ratings—IEC Specification
    4.     Recommended Operating Conditions
    5. 5.3 Thermal Information
    6. 5.4 Electrical Characteristics
    7. 5.5 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 ±15-kV IEC61000-4-2 Level 4 ESD Protection
      2. 6.3.2 IEC61000-4-4 EFT Protection
      3. 6.3.3 IEC61000-4-5 Surge Protection
      4. 6.3.4 I/O Capacitance
      5. 6.3.5 DC Breakdown Voltage
      6. 6.3.6 Ultra-Low Leakage Current
      7. 6.3.7 Low ESD Clamping Voltage
      8. 6.3.8 Industrial Temperature Range
      9. 6.3.9 Easy Flow-Through Routing
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 HDMI 2.0 Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Signal Range on Pin 1, 2, 4, or 5
        3. 7.2.1.3 Application Curves
      2. 7.2.2 HDMI 2.0 Application
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Signal Range
          2. 7.2.2.2.2 Operating Frequency
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
        1. 7.4.2.1 TPD4E05U06 Layout Example
        2. 7.4.2.2 TPD1E05U06 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information
    2. 10.2 Mechanical Data
  12. 重要声明
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Data Sheet

TPDxE05U06 适用于超高速（最高可达 6Gbps）接口的单通道、4 通道、6 通道静电放电 (ESD) 保护器件

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

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1 特性

  • IEC 61000-4-2 4 级 ESD 保护
    • ±12kV 接触放电
    • ±15kV 空气间隙放电
  • IEC 61000-4-4 EFT 保护
    • 80A (5/50ns)
  • IEC 61000-4-5 浪涌保护
    • 2.5A (8/20µs)
  • IO 电容 0.42pF 至 0.5pF（典型值）
  • 直流击穿电压为 6.5V（最小值）
  • 超低漏电流为 10nA（最大值）
  • 低 ESD 钳位电压
  • 工业级温度范围：-40°C 至 +125°C
  • 简易直通布线封装
  • 业界通用的 SOD-523 封装
    (1.60mm × 0.80mm × 0.65mm)

2 应用

  • HDMI 1.4b
  • HDMI 2.0
  • USB 3.0
  • MHL
  • LVDS 接口
  • DisplayPort
  • PCI-express®
  • eSata 接口
  • V-by-One® HS

3 说明

TPDxE05U06 是基于单向瞬态电压抑制器 (TVS) 的静电放电 (ESD) 保护二极管产品系列，具有超低电容。每个器件的 ESD 冲击消散值高于 IEC 61000-4-2 国际标准规定的最高水平。TPDxE05U06 超低负载电容特性使得该器件非常适合保护任何高速信号引脚。

TPDxE05U06 的典型应用包括 HDMI 1.4b、HDMI 2.0、USB 3.0、MHL、LVDS、DisplayPort、PCI-Express®、eSata 和 V-by-One® HS 中的高速信号线。

器件信息
器件型号 通道数 封装(1)
TPD1E05U06 单通道 DPY（X1SON，2）
DYA（SOD-523，2）
TPD4E05U06 4 通道 DQA（USON，10）
TPD6E05U06 6 通道 RVZ（USON，14）
(1) 有关更多信息，请参阅节 10。
TPD1E05U06 TPD4E05U06 TPD6E05U06 简化原理图简化原理图
TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD4E05U06 功能方框图TPD4E05U06 功能方框图

4 Pin Configuration and Functions

TPD1E05U06 TPD4E05U06 TPD6E05U06 DPY Package 2-Pin X1SON (Top View)Figure 4-1 DPY Package 2-Pin X1SON (Top View)
TPD1E05U06 TPD4E05U06 TPD6E05U06 DYA Package 2-Pin SOD-523 (Top View)Figure 4-2 DYA Package 2-Pin SOD-523 (Top View)
Table 4-1 Pin Functions TPD1E05U06 DPY and DYA
PIN TYPE(1) DESCRIPTION
NAME NO.
GND 2 Ground Ground; Connect to ground
I/O 1 I/O ESD protected channel(2)
(1) I = input, O = output
(2) Place as close to the connector as possible.
TPD1E05U06 TPD4E05U06 TPD6E05U06 DQA Package 10-Pin USON (Top View) Figure 4-3 DQA Package 10-Pin USON (Top View)
Table 4-2 Pin Functions TPD4E05U06 DQA
PIN TYPE(1) DESCRIPTION
NAME NO.
D1+ 1 I/O ESD protected channel(2)
D1– 2 I/O ESD protected channel(2)
D2+ 4 I/O ESD protected channel(2)
D2– 5 I/O ESD protected channel(2)
GND 3 Ground Ground; Connect to ground
GND 8
NC 6 — Not connected; Used for optional straight-through routing. Can be left floating or grounded
NC 7
NC 9
NC 10
(1) I = input, O = output
(2) Place as close to the connector as possible.
TPD1E05U06 TPD4E05U06 TPD6E05U06 RVZ Package 14-Pin USON (Top View) Figure 4-4 RVZ Package 14-Pin USON (Top View)
Table 4-3 Pin Functions TPD6E05U06 RVZ
PIN TYPE(1) DESCRIPTION
NAME NO.
D1+ 14 I/O ESD protected channel(2)
D1– 13 I/O ESD protected channel(2)
D2+ 12 I/O ESD protected channel(2)
D2– 11 I/O ESD protected channel(2)
D3+ 9 I/O ESD protected channel(2)
D3– 8 I/O ESD protected channel(2)
GND 5 Ground Ground; Connect to ground
GND 10
NC 1 — Not connected; Used for optional straight-through routing. Can be left floating or grounded
NC 2
NC 3
NC 4
NC 6
NC 7
(1) I = input, O = output
(2) Place as close to the connector as possible.

5 Specifications

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Electrical Fast Transient (2) (3) IEC 61000-4-4 (5/50ns) 80 A
Peak Pulse (2) (3) IEC 61000-4-5 Current (8/20us) 2.5 A
IEC 61000-4-5 Power (8/20us) 40 W
TA Ambient Operating Temperature -40 125 °C
Tstg Storage Temperature -65 155 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltages are with respect to GND unless otherwise noted.
(3) Measured at 25℃

5.1 ESD Ratings—JEDEC Specification

VALUE UNIT
V(ESD) Electrostatic discharge – DPY, DQA, and RVZ Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±4000 V
Charged device model (CDM), per JEDEC specification JESD22-C101 (2) ±1500 V
V(ESD) Electrostatic discharge – DYA Human body model (HBM), per ANSI/ESDA/JEDEC JS-001  ±2500 V
Charged device model (CDM), per JEDEC specification JS-002 ±1000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±4000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±1500 V may actually have higher performance.

5.2 ESD Ratings—IEC Specification

VALUE UNIT
V(ESD) Electrostatic discharge IEC 61000-4-2 contact discharge ±12000 V
IEC 61000-4-2 air-gap discharge ±15000

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIO Input pin voltage 0 5.5 V
TA Operating free-air temperature -40 125 °C

5.3 Thermal Information

THERMAL METRIC (1) TPD1E05U06 TPD4E05U06 TPD6E05U06 UNIT
DPY (X1SON) DYA (SOD523) DQA (USON) RVZ (USON)
2 PINS 2 PINS 10 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 697.3 772.1 327 197.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 471 444.6 189.5 119.1 °C/W
RθJB Junction-to-board thermal resistance 575.9 540.4 257.7 92.6 °C/W
ΨJT Junction-to-top characterization parameter 175.7 159.9 60.9 22 °C/W
ΨJB Junction-to-board characterization parameter 575.1 533.9 257 91.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

5.4 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
INPUT - OUTPUT RESISTANCE
VRWM Reverse stand-off voltage IIO < 10 µA 5.5 V
VBR Break-down voltage IIO = 1 mA 6.5 8.5 V
VClamp Clamp voltage IPP = 1 A, TLP, from I/O to GND (1) 10 V
IPP = 5 A, TLP, from I/O to GND (1) 14
IPP = 1 A, TLP, from GND to I/O (1) 3
IPP = 5 A, TLP, from GND to I/O (1) 7
ILEAK Leakage current VIO = 2.5 V 0.01 10 nA
RDYN Dynamic resistance DPY package I/O to GND (2) 0.8 Ω
GND to I/O (2) 0.8
DYA package I/O to GND (2) 0.8
GND to I/O (2) 0.7
DQA package I/O to GND (2) 0.8
GND to I/O (2) 0.8
RVZ package I/O to GND (2) 0.8
GND to I/O (2) 0.8
CAPACITANCE
CL Line capacitance (3) VIO = 2.5 V;  ƒ = 1 MHz , I/O to GND TPD1E05U06 DPY
package		 0.42 pF
TPD1E05U06 DYA
package		 0.42
TPD4E05U06 DQA
package		 0.5
TPD6E05U06 RVZ
package		 0.47
Δ CIO-TO-GND Variation of input capacitance GND Pin = 0 V, f = 1 MHz, VBIAS = 2.5 V,
Channel x pin to GND – channel y pin to GND		 0.05 0.07 pF
CCROSS Channel to channel input capacitance GND Pin = 0 V, f = 1 MHz, VBIAS = 2.5 V, between channel pins 0.01 0.06 pF
(1) Transition line pulse with 100 ns width, 200 ps rise time.
(2) Extraction of RDYN using least squares fit of TLP characteristics between I = 10 A and I = 20 A.
(3) Capacitance data is taken at 25°C.

5.5 Typical Characteristics

TPD1E05U06 TPD4E05U06 TPD6E05U06 DC Voltage Sweep I-V CurveFigure 5-1 DC Voltage Sweep I-V Curve
TPD1E05U06 TPD4E05U06 TPD6E05U06 Positive TLP Plot IO to GNDFigure 5-3 Positive TLP Plot IO to GND
TPD1E05U06 TPD4E05U06 TPD6E05U06 Leakage vs TemperatureFigure 5-5 Leakage vs Temperature
TPD1E05U06 TPD4E05U06 TPD6E05U06 –8-kV IEC WaveformFigure 5-7 –8-kV IEC Waveform
TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD4E05U06 Insertion LossFigure 5-9 TPD4E05U06 Insertion Loss
TPD1E05U06 TPD4E05U06 TPD6E05U06 Surge Curve (tp = 8/20 μs), Pin IO to GNDFigure 5-2 Surge Curve (tp = 8/20 μs), Pin IO to GND
TPD1E05U06 TPD4E05U06 TPD6E05U06 Negative TLP Plot IO to GNDFigure 5-4 Negative TLP Plot IO to GND
TPD1E05U06 TPD4E05U06 TPD6E05U06 8-kV IEC WaveformFigure 5-6 8-kV IEC Waveform
TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD1E05U06 Insertion LossFigure 5-8 TPD1E05U06 Insertion Loss
TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD6E05U06 Insertion LossFigure 5-10 TPD6E05U06 Insertion Loss

6 Detailed Description

6.1 Overview

The TPDxE05U06 is a family of unidirectional Transient Voltage Suppressor (TVS) based Electrostatic Discharge (ESD) protection diodes with ultra-low capacitance. Each device can dissipate ESD strikes above the maximum level specified by the IEC 61000-4-2 international standard. The TPDxE05U06 ultra-low loading capacitance makes the device an excellent choice for protecting any high-speed signal pins.

6.2 Functional Block Diagram

TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD1E05U06 Block Diagram Figure 6-1 TPD1E05U06 Block Diagram
TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD4E05U06 Block DiagramFigure 6-2 TPD4E05U06 Block Diagram
TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD6E05U06 Block DiagramFigure 6-3 TPD6E05U06 Block Diagram

 
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