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  • TLV6208x 采用 2mm x 2mm WSON 封装的 1.2A 和 2A 高效降压转换器

    • ZHCS484H October   2011  – January 2017 TLV62080 , TLV62084 , TLV62084A

      UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  • CONTENTS
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  • TLV6208x 采用 2mm x 2mm WSON 封装的 1.2A 和 2A 高效降压转换器
  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 修订历史记录
  5. 5  Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 100% Duty-Cycle Low-Dropout Operation
      2. 8.3.2 Enabling and Disabling the Device
      3. 8.3.3 Output Discharge
      4. 8.3.4 Soft Start
      5. 8.3.5 Power Good
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Thermal Shutdown
      8. 8.3.8 Inductor Current-Limit
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Save Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Output Filter Design
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Capacitor Selection
        5. 9.2.2.5 Setting the Output Voltage
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 开发支持
        1. 12.1.2.1 使用 WEBENCH® 工具定制设计方案
    2. 12.2 文档支持
    3. 12.3 相关链接
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 接收文档更新通知
    7. 12.7 社区资源
    8. 12.8 Glossary
  13. 13机械、封装和可订购信息
  14. 重要声明
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DATA SHEET

TLV6208x 采用 2mm x 2mm WSON 封装的 1.2A 和 2A 高效降压转换器

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。

1 特性

  • DCS-Control™架构，用于快速瞬态稳压
  • 2.5V 至 6V 输入电压范围 (TLV62080)
  • 2.7V 至 6V 输入电压范围（TLV62084 和 TLV62084A）
  • 100% 占空比，以实现最低压降
  • 用于实现轻载效率的省电模式
  • 输出放电功能
  • 电源正常输出
  • 热关断
  • 采用 2mm x 2mm、8 引脚晶圆级小外形无引线 (WSON) 封装
  • 有关改进的 特性 集，请参见 TPS62080
  • 使用 TLV6208x 并借助 WEBENCH® Power Designer 创建定制设计方案

2 应用范围

  • 电池供电类便携式器件
  • 负载点稳压器
  • PC、笔记本电脑、服务器
  • 机顶盒
  • 固态硬盘 (SSD)、存储器电源

3 说明

TLV6208x 系列器件是小型降压转换器，所用外部组件较少，可实现具有成本效益的解决方案。此类器件属于同步降压转换器，其输入电压范围为 2.5V/2.7V（TLV62080 为 2.5V，TLV62084x 为 2.7V）至 6V。TLV6208x 器件专注于在宽输出电流范围内实现高效降压转换。该转换器在中等至高负载条件下采用脉宽调制 (PWM) 模式，而在轻载电流条件下自动进入省电模式，从而在整个负载电流范围内保持高效运行。

为了满足系统电源轨需求，内部补偿电路支持在较大外部输出电容值范围内进行选择。凭借 DCS-Control™（无缝过渡至节能模式的直接控制）架构，该器件实现了优异的负载瞬态性能和输出电压稳压精度。该器件采用带有散热焊盘的 2mm x 2mm 晶圆级小外形无引线 (WSON) 封装。

器件信息(1)

器件型号 封装 封装尺寸（标称值）
TLV62080 WSON (8) 2.00mm x 2.00mm
TLV62084, TLV62084A
  1. 要了解所有可用封装，请见数据表末尾的可订购产品附录。

空白

典型应用电路原理图

效率与输出电流间的关系(VOUT = 1.2V)

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空白

TLV62080 TLV62084 TLV62084A SLVSAK9_simplified_62084.gif
TLV62080 TLV62084 TLV62084A D002_SLVSAK9.gif

4 修订历史记录

Changes from G Revision (September 2016) to H Revision

  • Added WEBENCH® 信息至 特性、详细设计流程和器件支持部分Go
  • Added SW (AC, less than 10 ns) to the Absolute Maximum Rating tableGo

Changes from F Revision (January 2015) to G Revision

  • Added TLV62084A 器件和 相关应用 Go
  • Added Power Good Pin Logic Table (TLV62080/84) and Power Good Pin Logic Table (TLV62084A) Go
  • Added scale factors in Figure 14 Go
  • Changed PCB Layout Image Go
  • Added 接收文档更新通知和社区资源部分。Go

Changes from E Revision (February 2014) to F Revision

  • Changed 器件信息表。Go
  • Renamed the Configuration and Functions section Go
  • Added new TI-Legal note to Application and Implementation section.Go
  • Renamed "Thermal Information" to Thermal ConsiderationsGo

Changes from D Revision (June 2013) to E Revision

  • Added 器件信息表，电源相关建议，器件和文档支持以及机械、封装和可订购信息部分Go
  • 阐明了 TLV62080 器件的输入范围 2.5V 至 5.5V 以及 TLV62084 器件的输入范围 2.7V 至 5.5VGo
  • Changed the Ordering Information table to the Device Comparison table and removed the Package Marking, TA, and Package columns from the table Go
  • Changed the word pin to terminal in most cases throughout the document Go
  • Added the Handling Ratings table which now contains the storage temperature range and ESD ratings Go
  • Added ILIM range for TLV62084 in Electrical Characteristics tableGo
  • Added the higher output voltage Output Voltage vs Load Current graph in the Typical Characteristics sectionGo
  • Replaced the Switching Frequency vs Load Current graph to the new Switching Frequency vs Output Current graph in the Typical Characteristics sectionGo
  • Replaced the TLV62080 typical application circuit with the circuit for the TLV62084Go
  • Deleted the Parameter Measurement Information Section and moved image and list of components to Typical Application sectionGo
  • Added Table 4 to the Design Requirements section Go
  • Added Moved Waveforms from the Typical Characteristics section into the Application Curves section. Changed LCOIL (coil inductance) to ICOIL (coil current) in the Typical Application (PWM Mode and PFM Mode), Load Transient, Line Transient, and Startup waveformsGo
  • Added the output capacitance and inductance conditions to the first (original) Load Transient graphGo
  • Added the second Load Transient graph (Figure 14)Go

Changes from C Revision (May 2013) to D Revision

  • Deleted TLV62084 device number from datasheetGo

Changes from B Revision (July 2012) to C Revision

  • Changed the Thermal Information table valuesGo

Changes from A Revision (November 2011) to B Revision

  • Changed QFN to SON in ORDERING INFORMATIONGo
  • Changed QFN to SON in DEVICE INFORMATIONGo
  • Changed Thermal Pad description in Pin FunctionsGo
  • Changed TJ in the Absolute Maximum Ratings From: –40 to 125°C To: -40 to 150°CGo
  • Changed several instances of DSC to DCS in DEVICE OPERATION sectionGo
  • Changed DSC to DCS in Functional Block DiagramGo

Changes from * Revision (October 2011) to A Revision

  • Changed pin VSNS to VOS in Figure 9Go
  • Changed pin VSNS to VOS in Figure 10Go

5 Device Comparison Table

PART NUMBER(1) INPUT VOLTAGE OUTPUT CURRENT Power Good Logic Level (EN=Low)
TLV62080 2.5 V to 6 V 1.2 A High Impedance
TLV62084 2.7 V to 6 V 2 A High Impedance
TLV62084A 2.7 V to 6 V 2 A Low
(1) For detailed ordering information please check the 机械、封装和可订购信息 section at the end of this datasheet.

6 Pin Configurations and Functions

space

8-Pin WSON With Thermal Pad
DSG Package
(Top View)
TLV62080 TLV62084 TLV62084A SLVSAK9_pinout.gif

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Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 EN IN Device enable logic input. Do not leave floating.
Logic HIGH enables the device, logic LOW disables the device and turns it into shutdown.
2, 3 GND PWR Power and signal ground.
4 FB IN Feedback terminal for the internal control loop.
Connect this terminal to the external feedback divider to program the output voltage.
5 VOS IN Output voltage sense terminal for the internal control loop. Must be connected to output.
6 PG OUT Power Good open drain output.
This terminal is pulled to low if the output voltage is below regulation limits. This terminal can be left floating if not used.
7 SW PWR Switch terminal connected to the internal MOSFET switches and inductor terminal.
Connect the inductor of the output filter here.
8 VIN PWR Power supply voltage input.
Exposed Thermal Pad — Must be connected to GND. Must be soldered to achieve appropriate power dissipation and mechanical reliability.

7 Specifications

7.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
Voltage range(2) VIN, PG, VOS – 0.3 7 V
SW – 0.3 VIN + 0.3 V
SW (AC, less than 10 ns)(3) – 3.0 10 V
FB – 0.3 3.6 V
EN – 0.3 VIN + 0.3 V
Power Good Sink Current PG 1 mA
Operating junction temperature range, TJ – 40 150 °C
Storage temperature range, Tstg – 65 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) While switching.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM) ESD stress voltage(1) ±2000 V
Charged device model (CDM) ESD stress voltage(2) ±500 V
(1) Level listed above is the passing level per ANSI/ESDA/JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions(1)

MIN TYP MAX UNIT
VIN Input voltage range, TLV62080 2.5 6 V
VIN Input voltage range, TLV62084, TLV62084A 2.7 6 V
TJ Operating junction temperature –40 125 °C
(1) Refer to the Application Information section for further information.

7.4 Thermal Information

THERMAL METRIC(1) TLV6208x
DSG
(8 PINS)		 UNITS
θJA Junction-to-ambient thermal resistance 59.7 °C/W
θJCtop Junction-to-case (top) thermal resistance 70.1 °C/W
θJB Junction-to-board thermal resistance 30.9 °C/W
ψJT Junction-to-top characterization parameter 1.4 °C/W
ψJB Junction-to-board characterization parameter 31.5 °C/W
θJCbot Junction-to-case (bottom) thermal resistance 8.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

Over recommended free-air temperature range, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted), VIN= 3.6 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range,TLV62080 2.5 6 V
VIN Input voltage range,TLV62084, TLV62084A 2.7 6 V
IQ Quiescent current into VIN IOUT = 0 mA, Device not switching 30 uA
ISD Shutdown current into VIN EN = LOW 1 µA
VUVLO Under voltage lock out Input voltage falling 1.8 2 V
Under voltage lock out hysteresis Rising above VUVLO 120 mV
TJSD Thermal shutdown Temperature rising 150 °C
Thermal shutdown hysteresis Temperature falling below TJSD 20 °C
LOGIC INTERFACE (EN)
VIH High level input voltage 2.5 V ≤ VIN ≤ 6 V 1 V
VIL Low level input voltage 2.5 V ≤ VIN ≤ 6 V 0.4 V
ILKG Input leakage current 0.01 0.5 µA
POWER GOOD
VPG Power good threshold VOUT falling referenced to VOUT nominal –15 –10 –5 %
Power good hysteresis 5 %
VOL Low level voltage Isink = 500 µA 0.3 V
IPG,LKG PG Leakage current VPG = 5.0 V 0.01 0.1 µA
OUTPUT
VOUT Output voltage range 0.5 4 V
VFB Feedback regulation voltage VIN ≥ 2.5 V and VIN ≥ VOUT + 1 V 0.438 0.45 0.462 V
IFB Feedback input bias current VFB = 0.45 V 10 100 nA
RDIS Output discharge resistor EN = LOW, VOUT = 1.8 V 1 kΩ
RDS(on) High side FET on-resistance ISW = 500 mA 120 mΩ
Low side FET on-resistance ISW = 500 mA 90 mΩ
ILIM High side FET switch current-limit, TLV62080 Rising inductor current 1.6 2.8 4 A
ILIM High side FET switch current-limit, TLV62084, TLV62084A Rising inductor current 2.3 2.8 4 A

7.6 Typical Characteristics

See Typical Application for characterization setup.

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Table 1. Table of Graphs

FIGURE
Efficiency Load current, VOUT = 0.9 V Figure 1
Load current, VOUT = 1.2 V Figure 2
Load current, VOUT = 2.5 V Figure 3
Output Voltage Accuracy Input Voltage, VOUT = 0.9 V Figure 4
Input Voltage, VOUT = 2.5 V Figure 5
Load current, VOUT = 0.9 V Figure 6
Load current, VOUT = 2.5 V Figure 7
Switching Frequency Load current, VOUT = 2.5 V Figure 8
TLV62080 TLV62084 TLV62084A D001_SLVSAK9.gif
VOUT = 0.9 V
Figure 1. Efficiency vs Load Current
TLV62080 TLV62084 TLV62084A D003_SLVSAK9.gif
VOUT = 2.5 V
Figure 3. Efficiency vs Load Current
TLV62080 TLV62084 TLV62084A D002_SLVSAK9.gif
VOUT = 1.2 V
Figure 2. Efficiency vs Load Current
TLV62080 TLV62084 TLV62084A D004_SLVSAK9.gif
VOUT = 0.9 V
Figure 4. Output Voltage vs Input Voltage
TLV62080 TLV62084 TLV62084A D005_SLVSAK9.gif
VOUT = 2.5 V
Figure 5. Output Voltage vs Input Voltage
TLV62080 TLV62084 TLV62084A D007_SLVSAK9.gif
VIN = 3.6 V
Figure 7. Output Voltage vs Load Current
TLV62080 TLV62084 TLV62084A D006_SLVSAK9.gif
VIN = 3.6 V
Figure 6. Output Voltage vs Load Current
TLV62080 TLV62084 TLV62084A D008_SLVSAK9.gif
VOUT = 2.5 V
Figure 8. Switching Frequency vs Output Current

8 Detailed Description

8.1 Overview

The TLV62080 and TLV62084x synchronous switched-mode converters are based on DCS-Control™. DCS-Control™ is an advanced regulation topology that combines the advantages of hysteretic and voltage mode control.

The DCS-Control™ topology operates in PWM (pulse width modulation) mode for medium to heavy load conditions and in power save mode at light load currents. In PWM mode, the TLV6208x converter operates with the nominal switching frequency of 2 MHz, having a controlled frequency variation over the input voltage range. As the load current decreases, the converter enters power save mode, reducing the switching frequency and minimizing the IC quiescent current to achieve high efficiency over the entire load current range. DCS-Control™ supports both operation modes (PWM and PFM) using a single building block with a seamless transition from PWM to power save mode without effects on the output voltage. The TLV62080 and TLV62084x devices offer both excellent DC voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits.

8.2 Functional Block Diagram

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TLV62080 TLV62084 TLV62084A SLVSAK9_FBD.gif

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8.3 Feature Description

8.3.1 100% Duty-Cycle Low-Dropout Operation

The devices offer low input-to-output voltage difference by entering the 100% duty-cycle mode. In this mode the high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. This mode is particularly useful in battery powered applications to achieve the longest operation time by taking full advantage of the whole battery voltage range. Equation 1 calculates the minimum input voltage to maintain regulation based on the load current and output voltage.

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Equation 1. TLV62080 TLV62084 TLV62084A Eq_VIN_min_lvsae8.gif

where

  • VIN,MIN = Minimum input voltage
  • IOUT,MAX = Maximum output current
  • RDS(on) = High-side FET on-resistance
  • RL = Inductor ohmic resistance

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8.3.2 Enabling and Disabling the Device

The device is enabled by setting the EN input to a logic HIGH. Accordingly, a logic LOW disables the device. If the device is enabled, the internal power stage starts switching and regulates the output voltage to the programmed threshold. The EN input must be terminated and not left floating.

8.3.3 Output Discharge

The output gets discharged through the SW terminal with a typical discharge resistor of RDIS whenever the device shuts down (by disable, thermal shutdown or UVLO).

8.3.4 Soft Start

When EN is set to start device operation, the device starts switching after a delay of about 40 μs and VOUT rises with a slope of about 10mV/μs (See Figure 16 and Figure 17 for typical startup operation). Soft start avoids excessive inrush current and creates a smooth output voltage rise slope. Soft start also prevents excessive voltage drops of primary cells and rechargeable batteries with high internal impedance.

If the output voltage is not reached within the soft start time, such as in the case of heavy load, the converter enters standard operation. Consequently, the inductor current limit operates as described in Inductor Current-Limit. The TLV62080 and TLV62084x devices are able to start into a pre-biased output capacitor. The converter starts with the applied bias voltage and ramps the output voltage to the nominal value.

8.3.5 Power Good

The TLV62080 and TLV62084x devices have a power-good output going low when the output voltage is below the nominal value. The power good maintains high impedance once the output is above 95% of the regulated voltage, and is driven to low once the output voltage falls below typically 90% of the regulated voltage. The PG terminal is an open drain output and is specified to sink typically up to 0.5 mA. The power good output requires a pull-up resistor which is recommended connecting to the device output. When the device is off because of disable, UVLO, or thermal shutdown, the PG terminal is at high impedance. TLV62084A features PG=Low in these cases. Table 2 and Table 3 show the different PG operation for the TLV6208x and TLV62084A. The PG output can be left floating if unused.

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Table 2. Power Good Pin Logic Table (TLV62080/84)

Device Information PG Logic Status
High Z Low
Enable (EN=High) VFB ≥ VPG √
VFB ≤ VPG √
Shutdown (EN=Low) √
UVLO 0.7V < VIN < VUVLO √
Thermal Shutdown TJ > TJSD √
Power Supply Removal VIN < 0.7V √

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Table 3. Power Good Pin Logic Table (TLV62084A)

Device Information PG Logic Status
High Z Low
Enable (EN=High) VFB ≥ VPG √
VFB ≤ VPG √
Shutdown (EN=Low) √
UVLO 0.7V < VIN < VUVLO √
Thermal Shutdown TJ > TJSD √
Power Supply Removal VIN < 0.7V √

space

The PG signal can be used for sequencing of multiple rails by connecting to the EN terminal of other converters. Leave the PG terminal unconnected when not in use.

8.3.6 Undervoltage Lockout

To avoid misoperation of the device at low input voltages, an undervoltage lockout is implemented which shuts down the device at voltages lower than VUVLO with a VHYS_UVLO hysteresis.

8.3.7 Thermal Shutdown

The device goes into thermal shutdown once the junction temperature exceeds typically TJSD. Once the device temperature falls below the threshold, the device returns to normal operation automatically.

8.3.8 Inductor Current-Limit

The Inductor current-limit prevents the device from high inductor current and drawing excessive current from the battery or input voltage rail. Excessive current can occur with a shorted or saturated inductor, a heavy load, or shorted output circuit condition.

The incorporated inductor peak-current limit measures the current during the high-side and low-side power MOSFET on-phase. Once the high-side switch current-limit is tripped, the high-side MOSFET is turned off and the low-side MOSFET is turned on to reduce the inductor current. When the inductor current drops down to the low-side switch current-limit, the low-side MOSFET is turned off and the high-side switch is turned on again. This operation repeats until the inductor current does not reach the high-side switch current-limit. Because of an internal propagation delay, the real current-limit value exceeds the static-current limit in the Electrical Characteristics table.

8.4 Device Functional Modes

8.4.1 Power Save Mode

As the load current decreases, the TLV62080 and TLV62084x devices enter power save mode operation. During power save mode, the converter operates with a reduced switching frequency in PFM mode and with a minimum quiescent current maintaining high efficiency. Power save mode occurs when the inductor current becomes discontinuous. Operation in power save mode is based on a fixed on time architecture. The typical on time is given by ton = 400 ns × (VOUT / VIN). The switching frequency over the whole load current range is shown in Figure 8.

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The devices are designed to operate from an input voltage supply range between 2.5 V (2.7 V for the TLV62084x devices) and 6 V with a maximum output current of 2 A (1.2 A for the TLV62080 device). The TLV6208x devices operate in PWM mode for medium to heavy load conditions and in power save mode at light load currents.

In PWM mode the TLV6208x converters operate with the nominal switching frequency of 2 MHz which provides a controlled frequency variation over the input voltage range. As the load current decreases, the converter enters power save mode, reducing the switching frequency and minimizing the IC quiescent current to achieve high efficiency over the entire load current range.

The WEBENCH software uses an iterative design procedure and accesses a comprehensive database of components when generating a design. See the 文档支持 section for additional documentation.

9.2 Typical Application

TLV62080 TLV62084 TLV62084A SLVSAK9_typapp.gif Figure 9. Typical Application Schematic

9.2.1 Design Requirements

Use the following typical application design procedure to select external components values for the TLV62084 device.

Table 4. Design Parameters

DESIGN PARAMETERS EXAMPLE VALUES
Input Voltage Range 2.8 V to 4.2 V
Output Voltage 1.2 V
Transient Response ±5% VOUT
Input Voltage Ripple 400 mV
Output Voltage Ripple 30 mV
Output Current Rating 2 A
Operating frequency 2 MHz

9.2.2 Detailed Design Procedure

9.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the TLV62080 device with the WEBENCH® Power Designer.

  1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
  2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
  3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

  • Run electrical simulations to see important waveforms and circuit performance
  • Run thermal simulations to understand board thermal performance
  • Export customized schematic and layout into popular CAD formats
  • Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

Table 5. List of Components

REFERENCE DESCRIPTION MANUFACTURER(1)
C1 10 μF, Ceramic Capacitor, 6.3 V, X5R, size 0603 Std
C2 22 μF, Ceramic Capacitor, 6.3 V, X5R, size 0805, GRM21BR60J226ME39L Murata
C3 47 μF, Tantalum Capacitor, 8 V, 35 mΩ, size 3528, T520B476M008ATE035 Kemet
L1 1 μH, Power Inductor, 2.2 A, size 3 mm × 3 mm × 1.2 mm, XFL3012-102MEB Coilcraft
R1 65.3 kΩ, Chip Resistor, 1/16 W, 1%, size 0603 Std
R2 39.2 kΩ, Chip Resistor, 1/16 W, 1%, size 0603 Std
R3 178 kΩ, Chip Resistor, 1/16 W, 1%, size 0603 Std
(1) See Third-party Products Disclaimer

9.2.2.2 Output Filter Design

The inductor and the output capacitor together provide a low pass frequency filter. To simplify this process Table 6 outlines possible inductor and capacitor value combinations for the most application.

Table 6. Matrix of Output Capacitor and Inductor Combinations

L [µH](3) COUT [µF](3)
10 22 47 100 150
0.47
1 + +(1)(2) + +
2.2 + + + +
4.7
(1) Plus signs (+) indicates recommended filter combinations.
(2) Filter combination in typical application.
(3) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by +20% and –50%. Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by +20% and –30%.

9.2.2.3 Inductor Selection

The main parameter for the inductor selection is the inductor value and then the saturation current of the inductor. To calculate the maximum inductor current under static load conditions, Equation 2 is given.

Equation 2. TLV62080 TLV62084 TLV62084A Eq_IL_peak_PWM_lvsae8.gif

where

  • IOUT,MAX = Maximum output current
  • ΔIL = Inductor current ripple
  • fSW = Switching frequency
  • L = Inductor value

space

TI recommends choosing the saturation current for the inductor 20% to approximately 30% higher than the IL,MAX, out of Equation 2. A higher inductor value is also useful to lower ripple current, but increases the transient response time as well. The following inductors are recommended to be used in designs (see Table 7).

Table 7. List of Recommended Inductors

INDUCTANCE
[µH]		 CURRENT RATING
[mA]		 DIMENSIONS
L x W x H [mm3]		 DC RESISTANCE
[mΩ typ]		 TYPE MANUFACTURER(2)
1 2500 3 × 3 × 1.2 35 XFL3012-102ME Coilcraft
1 1650(1) 3 × 3 × 1.2 40 LQH3NPN1R0NJ0 Murata
2.2 2500 4 × 3.7 × 1.65 49 LQH44PN2R2MP0 Murata
2.2 1600(1) 3 × 3 × 1.2 81 XFL3012-222ME Coilcraft
(1) Recommended for TLV62080 only due to limited current rating
(2) See Third-party Procucts Disclaimer

9.2.2.4 Capacitor Selection

The input capacitor is the low impedance energy source for the converter which helps to provide stable operation. A low ESR multilayer ceramic capacitor is recommended for best filtering and must be placed between VIN and GND as close as possible to those terminals. For most applications 10 μF is sufficient though a larger value reduces input current ripple.

The architecture of the TLV6208x device allows use of tiny ceramic-type output capacitors with low equivalent-series resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep the resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends use of the X7R or X5R dielectric. The TLV62080 and TLV62084x devices are designed to operate with an output capacitance of 10 to 100 µF and beyond, as listed in Table 6. Load transient testing and measuring the bode plot are good ways to verify stability with larger capacitor values.

Table 8. List of Recommended Capacitors

CAPACITANCE
[µF]		 TYPE DIMENSIONS
L x W x H [mm3]		 MANUFACTURER(1)
10 GRM188R60J106M 0603: 1.6 × 0.8 × 0.8 Murata
22 GRM188R60G226M 0603: 1.6 × 0.8 × 0.8 Murata
22 GRM21BR60J226M 0805: 2 × 1.2 × 1.25 Murata
(1) See Third-party Products Disclaimer

9.2.2.5 Setting the Output Voltage

By selecting R1 and R2, the output voltage is programmed to the desired value. Use Equation 3 to calculate R1 and R2.

TLV62080 TLV62084 TLV62084A SLVSAK9_simplified_62084.gif Figure 10. Typical Application Circuit

space

Equation 3. TLV62080 TLV62084 TLV62084A EQ1_VS_lvsae8.gif

For best accuracy, R2 must be kept smaller than 40 kΩ to ensure that the current flowing through R2 is at least 100-times larger than IFB. Changing the sum towards a lower value increases the robustness against noise injection. Changing the sum towards higher values reduces the current consumption.

9.2.3 Application Curves

TLV62080 TLV62084 TLV62084A G14_TPS62080.gif
VIN = 3.3 V VOUT = 1.2 V ILOAD = 500 mA
Figure 11. Typical Application (PWM Mode)
TLV62080 TLV62084 TLV62084A G17_TPS62080.gif
L = 1 µH COUT = 22 µF VIN = 3.3 V
VOUT = 1.2 V ILOAD = 50 mA to 1 A
Figure 13. Load Transient
TLV62080 TLV62084 TLV62084A G15_TPS62080.gif
VIN = 3.3 V VOUT = 1.2 V ILOAD = 10 mA
Figure 12. Typical Application (PFM Mode)
TLV62080 TLV62084 TLV62084A SLVSAK9_ltran084.gif
L = 1 µH COUT = 22 µF VIN = 3.3 V
VOUT = 1.2 V ILOAD = 200 mA to 1.8 A
Figure 14. Load Transient
TLV62080 TLV62084 TLV62084A G18_TPS62080.gif
VIN = 3.3 to 4.2 V VOUT = 1.2 V ILOAD = 2.2 Ω
Figure 15. Line Transient
TLV62080 TLV62084 TLV62084A G20_TPS62080.gif
VIN = 3.3 V VOUT = 1.2 V
Figure 17. Startup (No Load)
TLV62080 TLV62084 TLV62084A G19_TPS62080.gif
VIN = 3.3 V VOUT = 1.2 V ILOAD = 2.2 Ω
Figure 16. Startup

10 Power Supply Recommendations

The input power supply's output current needs to be rated according to the supply voltage, output voltage and output current of the TLV6208x.

11 Layout

11.1 Layout Guidelines

The PCB layout is an important step to maintain the high performance of the TLV62080 and TLV62084x devices.

  • Place input and output capacitors, along with the inductor, as close as possible to the IC which keeps the traces short. Routing these traces direct and wide results in low trace resistance and low parasitic inductance.
  • Use a common-power GND.
  • Properly connect the low side of the input and output capacitors to the power GND to avoid a GND potential shift.
  • The sense traces connected to FB and VOS terminals are signal traces. Keep these traces away from SW nodes.
  • Use care to avoid noise induction. By a direct routing, parasitic inductance can be kept small.
  • Use GND layers for shielding if needed.

11.2 Layout Example

space

space

space

TLV62080 TLV62084 TLV62084A SLVSAK9_layout_new.gif Figure 18. PCB Layout Suggestion

11.3 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.

Three basic approaches for enhancing thermal performance are listed below:

  • Improving the power dissipation capability of the PCB design.
  • Improving the thermal coupling of the component to the PCB by soldering the Thermal Pad.
  • Introducing airflow in the system.

For more details on how to use the thermal parameters, see the Thermal Characteristics application notes SZZA017 and SPRA953.

12 器件和文档支持

12.1 器件支持

12.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

12.1.2 开发支持

12.1.2.1 使用 WEBENCH® 工具定制设计方案

请单击此处，借助 WEBENCH® Power Designer 并使用 TLV62080 器件定制设计方案

  1. 在开始阶段键入输出电压 (VIN)、输出电压 (VOUT) 和输出电流 (IOUT) 要求。
  2. 使用优化器拨盘优化关键设计参数，如效率、封装和成本。
  3. 将生成的设计与德州仪器 (TI) 的其他解决方案进行比较。

WEBENCH Power Designer 提供一份定制原理图以及罗列实时价格和组件可用性的物料清单。

在多数情况下，可执行以下操作：

  • 运行电气仿真，观察重要波形以及电路性能
  • 运行热性能仿真，了解电路板热性能
  • 将定制原理图和布局方案导出至常用 CAD 格式
  • 打印设计方案的 PDF 报告并与同事共享

有关 WEBENCH 工具的详细信息，请访问 www.ti.com/WEBENCH。

12.2 文档支持

相关文档请参见以下部分：

  • 《TLV62080EVM-756 用户指南》，采用 2mm x 2mm 小外形尺寸无引线 (SON) 封装的 TLV62080，1.2A，高效降压转换器，文献编号：SLVU640

12.3 相关链接

下面的表格列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件，并且可以快速访问样片或购买链接。

Table 9. 相关链接

器件 产品文件夹 立即购买 技术文档 工具与软件 支持与社区
TLV62080 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处
TLV62084 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处
TLV62084A 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处

12.4 商标

DCS-Control, E2E are trademarks of Texas Instruments.

WEBENCH is a registered trademark of Texas Instruments.

DCS-Control is a trademark of TI.

All other trademarks are the property of their respective owners.

12.5 静电放电警告

esds-image

ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。

12.6 接收文档更新通知

如需接收文档更新通知，请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册后，即可每周定期收到已更改的产品信息。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。

12.7 社区资源

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.8 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 机械、封装和可订购信息

以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。



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