SWRZ101B December   2021  – December 2023 AM2732 , AM2732-Q1

 

  1.   1
  2.   Abstract
  3. 1Silicon Usage Notes and Advisories Matrices
    1.     Devices Supported
  4. 2 Usage Notes and Advisories
    1.     Silicon Usage Notes
      1.      i2293
      2.      i2295
      3.      i2300
      4.      i2324
      5.      i2364
      6.      i2389
      7.      i2390
    2.     Silicon Advisories
      1.      i2162
      2.      i2288
      3.      i2289
      4.      i2294
      5.      i2297
      6.      i2298
      7.      i2299
      8.      i2301
      9.      i2302
      10.      i2309
      11.      i2315
      12.      i2318
      13.      i2329
      14.      i2336
      15.      i2337
      16.      i2338
      17.      i2339
      18.      i2340
      19.      i2341
      20.      i2342
      21.      i2344
      22.      i2345
      23.      i2387
      24.      i2392
      25.      i2394
      26.      i2386
  5.   Trademarks
  6. 3Revision History

i2390

Recommended HWA memInit Sequence

Details

A race condition exists in the H/W : When the S/W clears a Done status bit , if in the same cycle H/W tries to set a different Done status bit, the later Done status bit is not latched by the register and is missed causing the S/W to hang.

Workaround

The S/W shall wait for all the Done status bits (MEM_INIT_DONE[13:14]) to be set before attempting to clear the status (MEM_INIT_DONE[13:14])

Or

Attempt to perform Memint sequentially one after another.

Or

After starting memInit poll for the (MEM_INIT_STATUS[13:14] bits to go low, then only clear the status (MEM_INIT_DONE[13:14]) .