SPRZ570A November   2023  – May 2024 AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3. 1Usage Notes and Advisories Matrices
  4. 2Silicon Revision 1.0 Usage Notes and Advisories
    1. 2.1 Silicon Revision 1.0 Usage Notes
      1.      i2324
    2. 2.2 Silicon Revision 1.0 Advisories
      1.      i2189
      2.      i2310
      3.      i2374
      4.      i2311
      5.      i2345
      6.      i2351
      7.      i2352
      8.      i2353
      9.      i2354
      10.      i2356
      11.      i2357
      12.      i2358
      13.      i2359
      14.      i2383
      15.      i2392
      16.      i2393
      17.      i2394
      18.      i2401
      19.      i2403
      20.      i2404
      21.      i2405
      22.      i2426
      23.      i2427
      24.      i2428
      25.      i2433
      26.      i2438
      27.      i2439
  5. 3Trademarks
  6. 4Revision History

i2374

PBIST fails if clock frequency of R5SS_CORE_CLK is not same as R5FSS_CLK_SELECTED frequency

Details

The R5SS memories receive the R5SS CPU clock “R5SS_CORE_CLK” which is derived from R5SS_CLOCK_SELECTED root clock using programmable divider. When R5SS memories are tested using PBIST controller, the PBIST controller receives R5SS_CLOCK_SELECTED root clock. PBIST operation fails if different frequencies are chosen for the two clocks.

Workaround

For PBIST to work with R5SS memories the frequency of both clocks need to be same. If application usage requires R5SS_CORE_CLK to be a divided frequency of R5SS_CLOCK_SELECTED, then during PBIST operation of R5SS memories, the application shall ensure the R5SS_CORE_CLK is configured to same frequency as R5SS_CLOCK_SELECTED.