SPRZ488D March 2022 – September 2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
SDFM module event flags (SDIFLG.FLTx_FLG_CEVTx) do not get set again if the comparator event is still active and digital filter path (using SDCOMPxCTL.CEVTxDIGFILTSEL) is being selected
The SDFM module supports a configurable Digital filter on the SDFM COMP output, which can be chosen by application for filtering glitches. The application can choose filtered or raw output of comparator to reach the Event flag register (SDIFLG.FLTx_FLG_CEVTx) and the CEVETxOUT event output of SDFM module as shown in the figure.The Path from Digital filter to event flag register has an Rise edge detection logic as shown in the figure.
When the Digital filter path is chosen, the Event flag register is set only once on the rise edge of Digital filter output. If the event flag register is cleared, it is not set again even if the comparator output is maintained high.
This issue is not present on the CEVETxOUT event going to XBAR.
Also this issue is not present if the raw output path is chosen (i.e CEVTxDIGFILTSEL = 0).
If SDFM digital filter is used in application the following workaround options can be considered:
• Option1
XBAR status can be observed instead of the event flag register.
OR
• Option2
1. After selecting the digital filter, wait for the interrupt/Trip.
2. When the interrupt occurs, read the event flag and take appropriate application action to rectify the cause of comparator trip.
3. Before clearing the event flag register, program the unfiltered path.
4. Clear the event flag.
5. Read the event flag and if it stays cleared for at-least one oversampling duration, reprogram the digital filter path.
Note: In between step 2-4, the PWM trip logic will also be working on unfiltered SDFM comparator out.