SPRZ447D July   2017  – February 2021 AM5746 , AM5748 , AM5749

 

  1. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  2. 2Silicon Advisories
    1.     Revisions SR 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i869
    36.     i870
    37.     i871
    38.     i872
    39.     i874
    40.     i878
    41.     i879
    42.     i883
    43.     i889
    44.     i890
    45.     i893
    46.     i896
    47.     i897
    48.     i898
    49.     i899
    50.     i900
    51.     i903
    52.     i904
    53.     i916
    54.     i929
    55.     i930
    56.     i932
    57.     i933
    58.     i936
    59.     i940
  3. 3Silicon Limitations
    1.     Revisions SR 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i845
    7.     i848
    8.     i876
    9.     i877
    10.     i892
    11.     i909
    12.     i925
  4. 4Silicon Cautions
    1.     Revisions SR 1.0 - Cautions List
    2.     i827
    3.     i832
    4.     i836
    5.     i839
    6.     i864
    7.     i885
    8.     i886
    9.     i912
    10.     i926
    11.     i931
    12.     i935
    13.     i937
  5. 5Revision History

i900

SoC Will Hang If Region 5 Accessed While CTRL_CORE_MMR_LOCK_5 Is Locked

CRITICALITY

Medium

DESCRIPTION

CTRL_CORE_MMR_LOCK_5 register has unexpected behavior.

There are five registers used to lock different memory regions of CTRL_MODULE_CORE memory space. A memory region is locked, means that all write accesses to this region are ignored. Writing a value unique for each register will lock certain memory region and writing another unique value results in unlocking of the same region.

The functionality of CTRL_CORE_MMR_LOCK_5 register is different than the other 4 registers.

If a write access to “locked” registers, which belong to MMR_LOCK_5 region is performed, all of the Control Module registers become inaccessible. Any write access to locked registers in MMR_LOCK_5 region leads to an error in Control Module interface bus.

Therefore, the write access is not only ignored but also blocks further access to the Control Module forever.

WORKAROUND

For accessing Control Module's configuration registers belonging to MMR_LOCK_5 region by CTRL_CORE_MMR_LOCK_5 register the following sequence must be used:

  1. Check if CTRL_CORE_MMR_LOCK_5 is locked - 0x143F832C. If yes, unlock CTRL_CORE_MMR_LOCK_5 as write 0x6F361E05.
  2. Modify the selected CTRL_CORE_PAD_x registers.
  3. Lock the CTRL_CORE_MMR_LOCK_5. The register is locked as write 0x143F832C.
  4. Do not write CTRL_CORE_PAD_x registers when CTRL_CORE_MMR_LOCK_5 is locked. This leads to an error in Control Module interface bus.

REVISIONS IMPACTED

AM574x SR 1.0
AM576x SR 1.0

AM574x: 1.0

DRA75xP, DRA74xP, DRA77xP, DRA76xP: 1.0

TDA2Px: 1.0

AM576x: 1.0