SPRZ436G October   2015  – February 2021 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL

 

  1. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  2. 2Silicon Advisories
    1.     Revisions SR 2.1, 2.0, 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i867
    36.     i868
    37.     i869
    38.     i870
    39.     i871
    40.     i872
    41.     i874
    42.     i875
    43.     i878
    44.     i879
    45.     i880
    46.     i882
    47.     i883
    48.     i887
    49.     i889
    50.     i890
    51.     i893
    52.     i895
    53.     i896
    54.     i897
    55.     i898
    56.     i899
    57.     i900
    58.     i903
    59.     i904
    60.     i906
    61.     i907
    62.     i913
    63.     i916
    64.     i927
    65.     i928
    66.     i929
    67.     i930
    68.     i932
    69.     i933
    70.     i936
    71.     i940
  3. 3Silicon Limitations
    1.     Revisions SR 2.1, 2.0, 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i845
    7.     i848
    8.     i876
    9.     i877
    10.     i892
    11.     i909
    12.     i922
    13.     i925
  4. 4Silicon Cautions
    1.     Revisions SR 2.1, 2.0, 1.0 - Cautions List
    2.     i827
    3.     i832
    4.     i836
    5.     i839
    6.     i864
    7.     i885
    8.     i886
    9.     i912
    10.     i918
    11.     i920
    12.     i921
    13.     i926
    14.     i931
    15.     i934
    16.     i935
  5. 5Revision History

Modules Impacted

Table 1-1 Silicon Advisories, Limitations, and Cautions by Module
MODULEDESCRIPTIONSILICON REVISIONS AFFECTED
AM571xAM570x
1.02.02.12.02.1
NAi862: Reset Should Use PORzYesYesYesYesYes
i864: VDDS18V to VDDSHVn Current PathYesYesYesYesYes
i931: VDD to VDDA_"PHY" Current PathYesYesYesYesYes
i934: VDDA_PCIE to VDDA33V_USB1 Current PathYesYes
BOOTi875: Power-on-Reset (PORz) Warm Boot HangYes
i927: SoC Doesn’t Read Redundant ONFI Parameter Pages in NAND Boot ModeYesYesYes
CAMSSi709: CSI-2 Receiver Executes Software Reset UnconditionallyYesYesYesYesYes
i904: CSI Interface Setup/Hold Timing Does Not Meet MIPI DPHY Spec above 600MHzYesYesYesYesYes
i913: CSI2 LDO Needs to Be Disabled when Module Is Powered OnYes
Control Modulei813: Spurious Thermal Alert Generation When Temperature Remains in Expected RangeYesYesYesYesYes
i814: Bandgap Temperature Read Dtemp Can Be CorruptedYesYesYesYesYes
i827: Thermal Alert Will Not Be Generated When Bandgap Is Configured in "Smart Idle" ModeYesYesYesYesYes
i863: MMC2 Has PU/PD Contention Immediately after Release from ResetYesYesYesYesYes
i869: IO Glitches Can Occur When Changing IO SettingsYesYesYesYesYes
i870: PCIe Unaligned Read Access IssueYesYesYesYesYes
i885: Software Requirements for Data Manual IO TimingYesYesYesYesYes
i900: SoC Will Hang If Region 5 Accessed While CTRL_CORE_MMR_LOCK_5 Is LockedYesYesYesYesYes
DCANi893: DCAN Initialization SequenceYesYesYesYesYes
i933: Access to IODELAY at Same Time as Other Peripheral on L4_PER2 Can HangYesYesYesYesYes
DEBUGi879: DSP MStandby Requires CD_EMU in SW_WKUPYesYesYesYesYes
i928: JTAG: Boundary Scan (BSDL) Cannot Control Select Signals When resetn is HighYesYesYesYes
DMAi378: sDMA Channel Is Not Disabled after a Transaction ErrorYesYesYesYesYes
i698: DMA4 Generates Unexpected Transaction on WR PortYesYesYesYesYes
i699: DMA4 Channel Fails to Continue with Descriptor Load When Pause Bit Is ClearedYesYesYesYesYes
i868: McASP to EDMA Synchronization Level Event Can Be LostYes
DSPi872: DSP MFlag Output Not InitializedYesYesYesYesYes
i879: DSP MStandby Requires CD_EMU in SW_WKUPYesYesYesYesYes
i883: DSP Doesn't Wake from Subsystem Internal InterruptsYesYesYesYesYes
i898: DSP Pre-fetch Should Be Disabled before Entering Power Down ModeYesYesYesYesYes
DSSi596: BITMAP1-2-4 Formats Not Supported by The Graphics PipelineYesYesYesYesYes
i631: Wrong Access in 1D Burst for YUV4:2:0-NV12 FormatYesYesYesYesYes
i641: Overlay Optimization LimitationsYesYesYesYesYes
i734: LCD1 Gamma Correction is Not Working When GFX Pipe Is DisabledYesYesYesYesYes
i815: Power Management Enhancement Implemented Inside DSS Leads to DSS UnderflowsYesYesYesYesYes
i829: Reusing Pipe Connected to Writeback Pipeline On -the-Fly to an Active PanelYesYesYesYesYes
i838: DSS BT.656/BT.1120 Max Horizontal Blanking is Non CompliantYesYesYesYesYes
i920: Dual-rank DDR with Twin Die Configuration is Not SupportedYesYesYes
i921: Limited GPMC Use Case Supported at 3.3VYesYesYes
i932: DPLL_VIDEOn May Require Multiple Lock AttemptsYesYesYesYesYes
i936: DSS LCD/DPI Out Field Reversal in Interlaced RGB ModeYesYesYesYesYes
EDMAi868: McASP to EDMA Synchronization Level Event Can Be LostYes
EMIFi727: Refresh Rate Issue after Warm ResetYesYesYesYesYes
i729: DDR Access Hang after Warm ResetYesYesYesYesYes
i878: MPU Lockup with Concurrent DMM and EMIF AccessesYesYesYesYesYes
i882: EMIF: DDR ECC Corrupted Read/Write Status ResponseYes
i895: EMIF_FW: System Hang When EMIF Firewall Is Reconfigured While There Is Activity on EMIF InterfaceYesYesYesYesYes
i918: Dual-rank DDR with Twin Die Configuration is Not SupportedYesYesYesYesYes
i922: Usability of ECC Feature in the DDR Controller is LimitedYesYesYesYesYes
eMMC/SD/SDIOi802: MMCHS DCRC Errors During Tuning ProcedureYesYesYesYesYes
i803: MMCHS Read Transfer with CMD23 Never Complete When BCE=0 And ADMA UsedYesYesYesYesYes
i832: DLL SW Reset Bit Does Not Reset to 0 after ExecutionYesYesYesYesYes
i834: MMCHS HS200 and SDR104 Command Timeout Window Too SmallYesYesYesYesYes
i836: Bus Testing Commands CMD19 Incorrectly Waits for CRC Status ReturnYesYesYesYesYes
i856: 32k Oscillator Fails to Start-Up at PORYesYesYesYesYes
i863: MMC2 Has PU/PD Contention Immediately after Release from ResetYesYesYesYesYes
i887: MMC3 Speed Limited to 64 MHzYesYesYesYesYes
i890: MMC1 IOs and PBIAS Must Be Powered-Up Before IsolationYesYesYesYesYes
i929: MMC1/2 SDR104/HS200 Mode DLL Delay Value May Result In Unexpected Tuning Pattern ErrorsYesYesYesYesYes
GMAC_SWi877: RGMII Clocks Should Be Enabled at Boot TimeYesYesYesYesYes
i880: Ethernet RGMII2 Limited to 10/100 MbpsYes
i899: Ethernet DLR Is Not SupportedYesYesYesYesYes
i903: Ethernet RMII Interface RMII_MHZ_50_CLK Not Supported as Output Reference ClockYesYesYesYesYes
GPIOi856: 32k Oscillator Fails to Start-Up at PORYesYesYesYesYes
GPMCi927: SoC Doesn’t Read Redundant ONFI Parameter Pages in NAND Boot ModeYesYesYes
I2Ci694: System I2C Hang Due to Miss of Bus Clear SupportYesYesYesYesYes
i833: I2C Module in Multislave Mode Potentially Acknowledges Wrong AddressYesYesYesYesYes
i930: I2C1 and I2C2 May Drive Low During ResetYesYesYesYesYes
INTCi883: DSP Doesn't Wake from Subsystem Internal InterruptsYesYesYesYesYes
Interconnecti871: L4_PER3 Firewall Initiator ConnID Value Left-Shift 1-BitYesYesYesYesYes
McASPi848: McASP IO Pad Loopback Not FunctionalYesYesYesYesYes
i868: McASP to EDMA Synchronization Level Event Can Be LostYes
i933: Access to IODELAY at Same Time as Other Peripheral on L4_PER2 Can HangYesYesYesYesYes
MPUi878: MPU Lockup with Concurrent DMM and EMIF AccessesYesYesYesYesYes
i940: MPU COUNTER_REALTIME saturates after several hundred days Yes Yes Yes Yes Yes
PCIei870: PCIe Unaligned Read Access IssueYesYesYesYesYes
i906: USB3.0 and PCIe Gen2 Electrical ComplianceYes
i909: PCIe Unintentional Translation of Outbound Message TLPsYesYesYesYesYes
i925: PCI-Express Gen2 (5.0 GT/s) Operation Not Supported When Operating Junction Temperature less than 0 deg CYesYesYesYes
i926: PCIe Preferred PCIe_PHY_RX SCP Register Settings UpdatedYesYesYesYesYes
PCIEi935: MSI Bit in PCIECTRL_TI_CONF_IRQSTATUS_MSI Register Does Not Clear AutomaticallyYesYesYesYesYes
PRCMi810: DPLL Controller Can Get Stuck While Transitioning to a Power Saving StateYesYesYesYesYes
i826: HSDIVIDER1 CLKOUT4 Could Glitch During On-the-Fly Divider Change to/from Divide-by-2.5YesYesYesYesYes
i876: DVFS Only Supported on MPUYesYesYesYesYes
i886: FPDLink PLL Unlocks with Certain SoC PLL M/N ValuesYesYesYesYesYes
i892: L3 Clocks Should Be Enabled at All TimesYesYesYesYesYes
PRU-ICSSi907: PRU-ICSS2 MII1 Port Is Not Supported When PRU-ICSS PRU1 Internal Wrapper Multiplexing Configured for MII2 ModeYes
PWMSSi933: Access to IODELAY at Same Time as Other Peripheral on L4_PER2 Can HangYesYesYesYesYes
QSPIi912: QSPI_SPI_CMD_REG [25:24] Masked from Read in RTLYesYesYesYesYes
i916: QSPI Reads Can Fail For Flash Devices with HOLD FunctionYesYesYesYesYes
SATAi782: SATA AHCI Command Issue OrderYesYesYes
i783: SATA Lockup after SATA DPLL Unlock/RelockYesYesYes
i807: SATA Host Controller Locks up If PIO Setup FIS Is Received and Bus Busy and Data Request Bits Are ClearedYesYesYes
i808: SATA Link Locks up under Certain ConditionsYesYesYes
i809: SATA Command Does Not Complete and Software Must Issue a Port Reset Under Certain ConditionsYesYesYes
i818: SATA PHY Reset Required Following SATA PLL UnlockYesYesYes
TIMERSi767: Delay Needed to Read Some Timer Registers After WakeupYesYesYesYesYes
i856: 32k Oscillator Fails to Start-Up at PORYesYesYesYesYes
i874: TIMER5/6/7/8 Interrupts Not PropagatedYesYesYesYesYes
UART/IrDA/CIRi202: MDR1 Access Can Freeze UART ModuleYesYesYesYesYes
i849: UART2_RXD Is Not Working for MUXMODE=0YesYesYesYesYes
i889: UART Does Not Acknowledge Idle Request after DMA Has Been EnabledYesYesYesYesYes
i933: Access to IODELAY at Same Time as Other Peripheral on L4_PER2 Can HangYesYesYesYesYes
USBi819: A Device Control Bit Meta-Stability for USB3.0 Controller in USB2.0 ModeYesYesYesYesYes
i820: Unexpected USB Link State Value upon U3 Exit by USB3.0 LinkYesYesYesYesYes
i824: USB3.0 Link Cannot Be Established When Suspend Mode Is EnabledYesYesYesYesYes
i845: USB2.0 False Detection of Disconnect ConditionYesYesYesYesYes
i867: USB SuperSpeed LFPS Signal Is Not Compliant with the USB3.0 StandardYes
i896: USB xHCI Port Disable Feature Does Not WorkYesYesYesYesYes
i897: USB xHCI Stop Endpoint Command Does Not Work in Certain CircumstancesYesYesYesYesYes
i906: USB3.0 and PCIe Gen2 Electrical ComplianceYes
VIPi839: Some RGB and YUV Formats Have Non-Standard OrderingYesYesYesYesYes
VPEi839: Some RGB and YUV Formats Have Non-Standard OrderingYesYesYesYesYes