SPRZ426E November 2014 – February 2021 DRA710 , DRA712 , DRA714 , DRA716 , DRA718 , DRA722 , DRA724 , DRA725 , DRA726
SATA AHCI Command Issue Order
Low
Advanced host controller Interface (AHCI) specification defines up to 32 command slots per port.
AHCI defines the highest priority slot as (pSlotLoc+1) mod MaxSlots, where pSlotLoc is the last slot from which a command was issued and MaxSlots is the number of slots per port (32 in this case).
The device implementation treats command slot 0 as the highest-priority slot and slot 31 as the lowest-priority slot.
Example:
Assuming that the last command was issued from slot 17 (and SATA_PxCI[31:0] CI contained 0 at an earlier time), when SATA_PxCI[31:0] CI is set to 0xFFFF FFFF, the command issue order should be 18, 19, 20 ... 31, 0, 1, 2 ... 17.
Instead, it is obseved 0, 1, 2, 3 ... 31.
This is a bug in the SATA controller.
No workaround is available. Implementation does not conform to AHCI specifications, but it does not affect a major functionality of SATA.
DRA72x SR 2.0, 1.0
TDA2Ex (23mm): 2.0, 1.0
AM571x: 2.1, 2.0, 1.0
DRA72x: 2.0, 1.0