SPRZ426E November   2014  – February 2021 DRA710 , DRA712 , DRA714 , DRA716 , DRA718 , DRA722 , DRA724 , DRA725 , DRA726

 

  1. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  2. 2Silicon Advisories
    1.     Revisions SR 2.1, 2.0, 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i867
    36.     i868
    37.     i869
    38.     i870
    39.     i871
    40.     i872
    41.     i874
    42.     i875
    43.     i878
    44.     i879
    45.     i880
    46.     i881
    47.     i882
    48.     i883
    49.     i887
    50.     i889
    51.     i890
    52.     i893
    53.     i895
    54.     i896
    55.     i897
    56.     i898
    57.     i899
    58.     i900
    59.     i903
    60.     i904
    61.     i906
    62.     i913
    63.     i916
    64.     i927
    65.     i928
    66.     i929
    67.     i930
    68.     i932
    69.     i933
    70.     i940
  3. 3Silicon Limitations
    1.     Revisions SR 2.1, 2.0, 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i844
    7.     i845
    8.     i848
    9.     i876
    10.     i877
    11.     i892
    12.     i909
    13.     i917
  4. 4Silicon Cautions
    1.     Revisions SR 2.1, 2.0, 1.0 - Cautions List
    2.     i781
    3. 4.1 93
    4.     i827
    5.     i832
    6.     i836
    7.     i839
    8.     i864
    9.     i885
    10.     i886
    11.     i912
    12.     i918
    13.     i920
    14.     i926
    15.     i931
    16.     i934
    17. 4.2 107
  5. 5Revision History

i895

EMIF_FW: System Hang When EMIF Firewall Is Reconfigured While There Is Activity on EMIF Interface

CRITICALITY

High

DESCRIPTION

If there is ongoing activity on the EMIF interface via the DMM path, any reconfiguration of EMIF_FW firewall instance can result in a system hang. This applies only to the EMIF_FW firewall instance. All other firewall instances can be safely re-configured at run-time using the sequence mentioned in TRM.

To reconfigure the firewall configuration at run-time, following sequence is to be followed:

  1. Set the REGUPDATE_CONTROL[0] BUSY_REQ bit to 0x1 to ensure that no transaction can reach the slave NIU (suspend).
  2. Update the firewall registers as required.
  3. Set the REGUPDATE_CONTROL[0] BUSY_REQ bit to 0x0 to resume the transactions.

In case of EMIF_FW firewall instance, the transactions to the slave (EMIF) are not blocked correctly in step 1 mentioned above. Initiator remains unaware that EMIF is not accepting commands and waits indefinitely for a response resulting in a system hang.

WORKAROUND

EMIF_FW firewall instance should not be reconfigured when there is on-going activity on the EMIF interface.

Following choices can be made based on practical constraints in the system.

  1. All firewall configurations are done one-time during the initial boot-up phase where EMIF transactions can be easily guaranteed to be not active. This will typically be done by a secondary boot loader or any other initialization software.
  2. Using inter-processor communication between all the cores in the system, ensure that there is no activity on the EMIF interface. At this point, firewall can be reconfigured safely.
  3. For some use-cases, to achieve same effect as changing firewall configuration at run-time, user can use a combination of DMM/MMU/Firewalls. In this case, firewall configuration is done only once during boot. Access permissions are controlled using aliased memory map created using DMM and controlling access to this aliased memory map using MMU.

REVISIONS IMPACTED

DRA72x SR 2.0, 1.0
DRA71x SR 2.1, 2.0

DRA79x: 2.1, 2.0

TDA2Ex (23mm): 2.0, 1.0

TDA2Ex (17mm): 2.1, 2.0

AM571x: 2.1, 2.0, 1.0

AM570x: 2.1, 2.0

DRA72x: 2.0, 1.0

DRA71x: 2.1, 2.0