SPRUJC6A December 2024 – July 2025 AM2752-Q1 , AM2754-Q1
Flash Command Write Data Register (Upper)
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| Instance Name | Physical Address |
|---|---|
| FSS0 | 0FC4 00ACh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| DATA_FLD | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| DATA_FLD | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| DATA_FLD | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DATA_FLD | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | DATA_FLD | R/W | 0h | Command Write Data Upper Byte: This is the command write data upper byte. This should be setup before triggering the command with execute field [bit 0] of the Flash Command Control register. It is the data that is to be written to the flash for any status or configuration write operation carried out by triggering the event in the Flash Command Control register. |