SNAA348 April   2021 TPL1401

 

  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Example
  7.   Design Featured Devices
  8.   Design References

Register Settings

Register Configuration for the TPL1401 Programmable Comparator
Register AddressRegister NameSettingDescription
0xD1GENERAL_CONFIG0x01E0[15:14] 0b00: Always write 0b00
[13] 0b0: Write 0b1 to lock the device. Unlock by writing 0b0101 to DEVICE_UNLOCK_CODE field in the PROTECT register
[12:5] 0x0F: Always write 0x0F
[4:3] 0b00: Powers up the device output
[2] 0b0: Disables the internal reference
[1:0] 0b00: Sets the reference to VOUT gain 1.5×
0xD3PROTECT0x0010[15:12] 0b0000: Write 0b0101 to unlock the device
[11:10] 0b00: Don't care
[9] 0b0: Write 0b1 to load all registers with factory reset values
[8:6] 0b000: Always write 0b000
[5] 0b0: Write 0b1 to reload applicable registers with existing NVM settings
[4] 0b1: Write 0b1 to store applicable register settings to the NVM
[3:0] 0b0000: Write 0b1010 to reset registers with existing NVM settings or default settings
0x21DPOT_POSITION0x0660[15:12] 0b0000: Don't care
[11:4] 0x66: 8-bit data updates the digipot output
[3:0] 0b0000: Don't care