SLVUDD7 March   2026 BQ25640

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Header Information
    2. 2.2 Jumper Information
    3. 2.3 Equipment
    4. 2.4 Hardware Setup
  9. 3Software
    1. 3.1 Software Setup
    2. 3.2 Test Procedure
      1. 3.2.1 Initial Power Up
      2. 3.2.2 I2C Register Communication Verification
      3. 3.2.3 Charger Mode Verification
      4. 3.2.4 Boost Mode Verification
      5. 3.2.5 Helpful Tips
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 PCB Layout Guidelines
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1.     Trademarks

3.2.3 Charger Mode Verification

Use the following steps for charger mode verification:

  1. PS #1 is on from Section 3.2.1. In the EVM software, select BQ25640EVM twice.
    • Verify that all Fault statuses read Normal.
      BQ25640EVM
  2. To confirm SYS voltage regulation, enable Load #1 (see Section 2.4) and take DMM measurements as follows:
    • Measure → VSYS (SYS-TP14 and PGND-TP27 or TP29) = 3.75V ±0.3V.
    • Measure → VBAT (BAT-TP13 and PGND-TP27 or TP29) = 2.5V ±0.2V.
    • Measure → IBAT = 200mA ±50mA.
  3. To confirm battery charge current regulation, change Load #1 to 3.7V and take DMM measurements as follows:
    • Measure → VSYS (SYS-TP14 and PGND-TP27 or TP29) = 3.8V ±0.3V.
    • Measure → VBAT (BAT-TP13 and PGND-TP27 or TP29) = 3.7V ±0.2V.
    • Measure → IBAT = 480mA ±100mA.
  4. To confirm input current limit operation, in the EVM software on the 16-bit tab, set fast charge current to 1040mA and then take DMM measurement ( or PS #1 measurement if accurate) as follows:
    • Measure → IIN = 500 mA ±200mA.