SLVAEY6A November 2020 – June 2025 TPS3813-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the TPS3813-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to VDD (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the TPS3813-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS3813-Q1 data sheet.
Figure 4-1 Top ViewSot23 (6) PackageTable 4-2 Pin FMA for Device Pins Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| WDI | 1 | A constant watchdog timeout fault is detected on the RESET pin. | B |
| GND | 2 | Normal operation. | D |
| WDT (When WDT = VDD) |
3 | VDD shorts to GND. The device has no power for normal operation. | B |
| WDT (When WDT = GND) |
3 | Behavior is as expected. Refer to the Window-Watchdog Configuration Setting table in the data sheet. | D |
| WDT (When WDT = External Capacitor ) |
3 | The expected timing is observed until a voltage fault occurs. After the fault, the timing changes accordingly, since WDT = GND. | C |
| VDD | 4 | The device is not damaged, but the condition of the device is undefined. The RESET pin tends to be low. | B |
| WDR (When WDR = VDD) |
5 | VDD shorts to GND. The device has no power for normal operation. | B |
| WDR (When WDR = GND) |
5 | Normal operation mode. Behavior is as expected. Refer to the Window-Watchdog Configuration Setting table in the data sheet. | D |
| RESET | 6 | The RESET pin is constantly low; some additional current can flow through the pullup resistor. | B |
Table 4-3 Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| WDI | 1 | A constant watchdog timeout fault is detected on the RESET pin. | B |
| GND | 2 | The device is not operational. | B |
| WDT | 3 | No damage to the device, but the device enters an undefined timing operation. Observe that the window frame (twindow) shortens when WDT is left open. | B |
| VDD | 4 | The device is not powered. | B |
| WDR | 5 | No damage to the device, but TI recommends that this pin is not left open. | B |
| RESET | 6 | High impedance output, RESET functionality. | B |
Table 4-4 Pin FMA for Device Pins Short-Circuited to Relevant Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| WDI | 1 | GND | A constant watchdog timeout fault is detected on the RESET pin. | B |
| GND | 2 | WDT | The failure effect class depends on the WDT connection. Refer to the Short Circuit to Ground table. | Dependent |
| WDT | 3 | VDD | The failure effect class depends on the WDT connection. Refer to the Short Circuit to VDD table. | Dependent |
| VDD | 4 | WDR | The failure effect class depends on the WDR connection. Refer to the Short Circuit to VDD table. | Dependent |
| WDR | 5 | RESET | No damage to the device, but the device
is in an undefined operating condition. The failure effect class depends on the WDR connection; the RESET pin is either tied to GND or VDD. Refer to table 4.2 and 4.5 of this section. |
Dependent |
| RESET | 6 | WDI | No damage to the device, but the device
is in an undefined operating condition. With the WDI signal applied: RESET forcefully follows the WDI input, and no reset assertion occurs due to VDD voltage faults. |
B |
Table 4-5 Pin FMA for Device Pins Short-Circuited to VDD
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| WDI | 1 | A constant watchdog timeout fault is detected on the RESET pin. | B |
| GND | 2 | VDD shorts to GND. The device has no power for normal operation. | B |
| WDT (When WDT = VDD) |
3 | Behavior is as expected. Refer to the Window-Watchdog Configuration Setting table in the data sheet. | D |
| WDT (When WDT = GND) |
3 | VDD shorts to GND. The device has no power for normal operation. | B |
| WDT (When WDT = External Capacitor ) |
3 | The expected timing is observed until a voltage fault occurs. After the fault, the timing changes accordingly; since WDT = VDD. | B |
| VDD | 4 | Normal operation. | D |
| WDR (When WDR = VDD) |
5 | Normal operation mode. Behavior is as expected. Refer to the Window-Watchdog Configuration Setting table in the data sheet. | D |
| WDR (When WDR = GND) |
5 | VDD shorts to GND. The device has no power for normal operation. | B |
| RESET | 6 | A large current can flow into the device, potentially causing damage. | A |