SFFS340A February 2022 – December 2025 LM5164

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LM5164. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to ground (see Table 4-2)
Pin open-circuited (see Table 4-3)
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality.
B	No device damage, but loss of functionality.
C	No device damage, but performance degradation.
D	No device damage, no impact to functionality or performance.

Figure 4-1 shows the LM5164 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the LM5164 datasheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

The application circuit is configured per the LM5164 datasheet.
- The PGOOD pin is pulled up to VOUT.

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No	Description of Potential Failure Effects	Failure Effect Class
GND	1	N/A	D
VIN	2	VOUT = 0V.	B
EN/UVLO	3	VOUT = 0V.	B
RON	4	VOUT is unregulated; 0 ≤ VOUT < set voltage.	B
FB	5	VOUT > set voltage. The PGOOD pin can become damaged if VIN > 14V.	A
PGOOD	6	The flag of the PGOOD pin is invalid.	B
BST	7	VOUT = 0V.	B
SW	8	The power FET is damaged.	A

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No	Description of Potential Failure Effects	Failure Effect Class
GND	1	VOUT = 0V.	B
VIN	2	VOUT = 0V.	B
EN/UVLO	3	VOUT = 0V.	B
RON	4	VOUT > set voltage.	B
FB	5	VOUT > set voltage. The PGOOD pin can become damaged if VIN > 14V.	A
PGOOD	6	The flag of the PGOOD pin is invalid.	B
BST	7	VOUT = 0V.	B
SW	8	VOUT = 0V.	B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No	Short to	Description of Potential Failure Effects	Failure Effect Class
GND	1	VIN	The input is grounded. The device is disabled. VOUT = 0V.	B
VIN	2	EN/UVLO	There is no impact on functionality.	D
EN/UVLO	3	RON	The device is potentially disabled.	B
			The device potentially operates at an incorrect frequency if the EN pin is connected to the VIN pin through a resistor, depending on the resulting voltage of the EN pin from the specific resistor network.	C
			The device is potentially damaged if the EN pin is directly shorted to the VIN pin.	A
RON	4	N/A	N/A	D
FB	5	PGOOD	There is no impact on functionality if there is no external pullup at the PGOOD pin.	D
FB	5	PGOOD	VOUT is potentially lower than the set-point if an external pullup exists at the PGOOD pin.	C
PGOOD	6	BST	The device cannot start up due to the pulldown of the PGOOD pin, which prevents the BST voltage from being established. VOUT = 0V.	B
PGOOD	6	BST	When the short occurs during operation, the PGOOD pin is potentially damaged if the absolute maximum voltage rating of the PGOOD pin is exceeded.	A
BST	7	SW	Boot voltage cannot be established, and the device is disabled. VOUT = 0V.	B
			VOUT potentially equals the internal VDD (5V) minus the diode drop of the internal boot diode if the output rail is an open circuit.	B
			VOUT potentially drops to 0V if the load exceeds the internal VDD of the current limit of the LDO. VOUT = 0V.	B
SW	8	N/A	N/A	D

Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply

Pin Name	Pin No	Description of Potential Failure Effects	Failure Effect Class
GND	1	VOUT = 0V.	B
VIN	2	N/A	D
EN/UVLO	3	N/A	D
RON	4	VIN > 5.5V can lead to device damage.	A
FB	5	VIN > 5.5V can lead to device damage.	A
PGOOD	6	VIN > 14V can lead to device damage.	A
BST	7	VOUT = 0 V.	B
SW	8	VOUT = VIN. The PGOOD pin can be damaged if VIN > 14V.	A