SDAA064 November   2025 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Abstract
  3. 1Introduction
  4. 2Building Blocks for LFU
  5. 3Details of Proposed Design
    1. 3.1 Flash Bank Organization
    2. 3.2 LFU Concepts and Factors Impacting Performance
    3. 3.3 Hardware Support for LFU
      1. 3.3.1 A/B Swappable Flash Banks
      2. 3.3.2 Interrupt Vector Table Swap
  6. 4Application LFU Flow
  7. 5Results and Conclusion
  8. 6Example Implementations
  9. 7Summary
  10. 8References

3.1 Flash Bank Organization

LFU is currently only available in bank mode 1 for HS-FS devices, which has the following flash MAIN region address mapping:

Flash MAIN Region Address Mapping Figure 3-1 Flash MAIN Region Address Mapping

When SWAP = 0, the active flash banks are FLC1.B0/B1 and FLC2.B0/B1. When SWAP = 1, the active flash banks are FLC1.B2/B3 and FLC2.B2/B3. Both the active and inactive flash banks are split into sections for the SBL and the application space, shown below:

Flash Banks Figure 3-2 Flash Banks

When performing a firmware update, the inactive flash bank is erased and programmed with a new certificate, SBL, and application image.