SLVSFZ4A December 2020 – February 2021 TPS929121-Q1
PRODUCTION DATA
The register address byte, REG_ADDR frame follows the device address frame. There are total 8 bits binary code in register address byte. The maximum allowed register address is 255. Figure 8-14 is the timing diagram for register address frame and data frame.
BIT | FIELD | DESCRIPTION |
---|---|---|
0 - 7 | REG_ADDR | Register address. |