ZHCSO39B May   2022  – August 2022 TPS7A74

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Active Discharge
      3. 7.3.3 Global Undervoltage Lockout (UVLO) Circuit
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
    5. 7.5 Programming
      1. 7.5.1 Programmable Soft-Start
      2. 7.5.2 Sequencing Requirements
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjusting the Output Voltage
      2. 8.1.2 Input, Output, and Bias Capacitor Requirements
      3. 8.1.3 Transient Response
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Output Noise
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 FPGA I/O Supply at 1.8 V With a Bias Rail
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Estimating Junction Temperature
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 接收文档更新通知
    4. 9.4 支持资源
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 术语表
  10. 10Mechanical, Packaging, and Orderable Information

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7.5.1 Programmable Soft-Start

The TPS7A74 features a programmable, monotonic, voltage-controlled soft-start that is set with an external capacitor (CSS). This feature is important for many applications because the soft-start eliminates power-up initialization problems when powering FPGAs, DSPs, or other processors. The controlled voltage ramp of the output also reduces peak inrush current during start-up, minimizing start-up transient events to the input power bus.

To achieve a linear and monotonic soft-start, the error amplifier tracks the voltage ramp of the external soft-start capacitor until the voltage exceeds the internal reference. The soft-start ramp time depends on the soft-start charging current (ISS), soft-start capacitance (CSS), and the internal reference voltage (VREF). Equation 4 calculates the soft-start ramp time.

Equation 4. GUID-8D02C33A-C954-4036-A2AF-A0489ECBE8F6-low.gif

If large output capacitors are used, the device current limit (ICL) and the output capacitor may set the start-up time. The start-up time is given by Equation 5 in this case.

Equation 5. GUID-1F5021B8-177B-413B-B2C1-1FDDE6E4D59A-low.gif

where:

  • VOUT(nom) is the nominal output voltage
  • COUT is the output capacitance
  • ICL(min) is the minimum current limit for the device

In applications where monotonic start up is required, the soft-start time given by Equation 4 must be set greater than Equation 5.

The maximum recommended soft-start capacitor is 15 nF. Larger soft-start capacitors can be used and do not damage the device; however, the soft-start capacitor discharge circuit may not be able to fully discharge the soft-start capacitor when enabled. Soft-start capacitors larger than 15 nF can be a problem in applications where the enable pin must be rapidly pulsed and the device must soft-start from ground. CSS must be low-leakage; X7R, X5R, or C0G dielectric materials are preferred. Table 7-2 lists suggested soft-start capacitor values.

Table 7-2 Standard Capacitor Values for Programming the Soft-Start Time(1)
CSSSOFT-START TIME
Open0.1 ms
1 nF0.032 ms
5.6 nF0.182 ms
10 nF0.325 ms
(1) GUID-20220316-SS0I-N31W-TXWW-MGBTGQWMBZRD-low.gif, where tSS(s) = soft-start time in seconds.

Another option to set the start-up rate is to use a feedforward capacitor; see the Pros and Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator application note for more information.