SLVS227G August   1999  – June 2024

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings for TPS3123
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Dissipation Rating Table
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Manual Reset ( MR)
      2. 7.3.2 Active-High or Active-Low Output
      3. 7.3.3 Push-Pull or Open-Drain Output
      4. 7.3.4 Watchdog Timer (WDI)
    4. 7.4 Device Functional Modes
  9. 8 Device and Documentation Support
    1. 8.1 Device and Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DBV|5
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RMR MR pullup resistor (internal) 27 kΩ
IIH High-level input current WDI WDI = VDD = 3.3V 1 1 μA
MR MR = 0.7 × VDD, VDD = 3.3V 20 55
IIL Low-level input current WDI WDI = 0V, VDD = 3.3V 1 1 μA
MR MR = 0V, VDD = 3.3V 80 170
IOH High-level output current
(leakage into RESET pin)		 TPS3126-xx,
TPS3128-xx		 VDD = VOH = 3.3V 200 nA
VOH High-level output voltage (TPS3123/4/5 only) RESET VDD = 1.5V, IOH = –1mA 0.8×VDD V
VDD = 3.3V, IOH = –4.5mA
RESET VDD = 0.75V, IOH = –8 μA
VDD = 1.5V, IOH = –1mA
VOL Low-level output voltage RESET VDD = 0.75V, IOL = 15μA 0.2 × VDD V
VDD = 1.5V, IOL = 1.4mA
RESET VDD = 1.5V, IOL = 1.4mA
VDD = 3.3V, IOL = 3mA 0.4
VIT– Negative-going input threshold
voltage (1)		 TPS312xJ12 TA = –40°C to +85°C 1.04 1.08 1.12 V
TPS312xG15 1.35 1.40 1.45
TPS312xJ18 1.56 1.62 1.68
TPS312xL30 2.57 2.64 2.71
TPS312xE12 1.10 1.14 1.18
TPS312xE15 1.38 1.43 1.48
TPS312xE18 1.65 1.71 1.77
VHYS Hysteresis at VDD input 1V < VIT– < 1.4V 15 mV
1.4V < VIT– < 2V 20
2V < VIT– < 3V 30
IDD Supply current TPS3123-xx TPS3124-xx TPS3128-xx WDI = VDD,
MR unconnected		 VDD = 0.75V 14 μA
VDD = 3.3V 22 30
TPS3125-xx TPS3126-xx (2) MR unconnected VDD = 0.75V 14
VDD = 3.3V 18 25
Ci Input capacitance at MR, WDI VI = 0V to 3.3V 5 pF
(1) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1μF) should be placed near the supply terminal.
(2) The supply current during delay time td is typical 5μA higher.