ZHCSI22E October   2017  – August 2019 TPS2662

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
      2.      –60V 电源时的反向输入极性保护
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and In-Rush Current Control
      4. 9.3.4 Reverse Polarity Protection
        1. 9.3.4.1 Input Side Reverse Polarity Protection
        2. 9.3.4.2 Output Side Reverse Polarity Protection
      5. 9.3.5 Overload and Short Circuit Protection
        1. 9.3.5.1 Overload Protection
        2. 9.3.5.2 Short Circuit Protection
          1. 9.3.5.2.1 Start-Up With Short-Circuit On Output
      6. 9.3.6 Reverse Current Protection
      7. 9.3.7 FAULT Response
      8. 9.3.8 IN, OUT, RTN, and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Low Current Shutdown Control (SHDN)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step by Step Design Procedure
        2. 10.2.2.2 Programming the Current-Limit Threshold R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Setting Output Voltage Ramp Time—(tdVdT)
          1. 10.2.2.4.1 Case 1: Start-Up Without Load—Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.4.2 Case 2: Start-Up With Load —Output Capacitance C(OUT) and Load Draws Current During Start-Up
          3. 10.2.2.4.3 Support Component Selections - RFLT and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Field Supply Protection in PLC, DCS I/O Modules
      2. 10.3.2 Simple 24-V Power Supply Path Protection
      3. 10.3.3 Power Stealing in Smart Thermostat
    4. 10.4 Do's and Don'ts
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 接收文档更新通知
    2. 13.2 社区资源
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Undervoltage Lockout (UVLO)

When the voltage at UVLO pin falls below V(UVLOF) during input power fail or input undervoltage fault, the internal FET quickly turns off and FLT is asserted. The UVLO comparator has a hysteresis of 100 mV. To set the input UVLO threshold, connect a resistor divider network from IN supply to UVLO terminal to RTN as shown in Figure 31.

TPS2662 EN_UVLO_OVP_Diagram.gifFigure 31. UVLO and OVP Thresholds Set by R1, R2 and R3

If the Undervoltage Lockout function is not needed, the UVLO terminal must be connected to the IN terminal with a 1 MΩ resistor. UVLO pin is 5 V rated and this resistor limits the UVLO pin current to < 60 µA. The UVLO terminal must not be left floating.

The TPS26620, TPS26622 and TPS26624 variants feature a UVLO_tREC timer. If the tOFF time + tdVdT time exceed UVLO_tREC time, the device latches off. tOFF time is the time when VUVLO falls below V(UVLOF) and not rises above V(UVLOR) and VIN is above V(PORR). tdVdT is the output ramp time as defined in Equation 2 The latch off can be reset by cycling SHDN or VIN. More details of this feature are shown in Figure 30.