ZHCSMT5M December   2004  – January 2023 TLV1117

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 TLV1117C Electrical Characteristics
    6. 6.6 TLV1117I Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 NPN Output Drive
      2. 7.3.2 Overload Block
      3. 7.3.3 Programmable Feedback
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Operation With Low Input Voltage
      3. 7.4.3 Operation at Light Loads
      4. 7.4.4 Operation in Self Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  10. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • KVU|3
  • DRJ|8
  • DCY|4
  • KCS|3
  • KTT|3
  • KCT|3
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.4 Thermal Information

THERMAL METRIC(1)(2)(3)TLV1117UNITS
PowerFlexDRJ
(8 PINS)		DCY
(4 PINS)		KVU
(3 PINS)		KCS, KCT
(3 PINS)		KTT
(3 PINS)
KTE
(3 PINS)		KTP
(3 PINS)
RθJAJunction-to-ambient thermal resistance38.649.238.3104.350.930.127.5°C/W
RθJC(top)Junction-to-case (top) thermal resistance34.760.636.553.757.944.643.2 °C/W
RθJBJunction-to-board thermal resistance3.23.160.55.734.81.217.3 °C/W
ψJTJunction-to-top characterization parameter5.98.70.23.1652.8 °C/W
ψJBJunction-to-board characterization parameter3.13125.523.71.29.3 °C/W
RθJC(bot)Junction-to-case (bottom) thermal resistance334.7n/a0.40.40.3 °C/W
RθJPThermal resistance between the die junction and the bottom of the exposed pad.2.71.41.78n/an/a31.94 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
(3) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a.