SCLS403I April 1998 – March 2015 SN74LV164A
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
请参考 PDF 数据表获取器件具体的封装图。
The SNx4LV164A devices are 8-bit parallel-out serial shift registers designed for 2-V to 5.5-V VCC operation.
These devices feature NAND-gated serial (A and B) inputs and an asynchronous clear (CLR) input. The gated serial inputs permit complete control over incoming data, as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while the clock is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of the clock (CLK) input.
The wide operating range allows the device to be used in a variety of systems that use different logic levels. The low propagation delay allows fast switching and higher speeds of operation. In addition, the low ground bounce stabilizes the performance of non-switching outputs while another output is switching.
INPUTS | OUTPUTS | ||||||
---|---|---|---|---|---|---|---|
CLR | CLK | A | B | QA | QB | ... | QH |
L | X | X | X | L | L | L | |
H | L | X | X | QA0 | QB0 | QH0 | |
H | ↑ | H | H | H | QAn | QGn | |
H | ↑ | L | X | L | QAn | QGn | |
H | ↑ | X | L | L | QAn | QGn |