Robust and reliable bus node design often requires
the use of external transient protection devices in order to protect against EFT and
surge transients that may occur in industrial environments. Due to the wide
frequency bandwidth (from approximately 3 MHz to 3 GHz) that the transients have,
high-frequency layout techniques must be applied during PCB design.
- Place the protection
circuitry close to the bus connector to prevent noise transients from
entering the board.
- Use VCC and ground
planes to provide low-inductance.
Note:
High-frequency currents follow the path of
least inductance and not the path of least impedance.
- Design the protection
components into the direction of the signal path. Do not force the
transients currents to divert from the signal path to reach the protection
device.
- Apply 100-nF to 220-nF bypass
capacitors as close as possible to the VCC pins of transceiver,
UART, and controller ICs on the board.
- Use at least two vias for
VCC and ground connections of bypass capacitors and
protection devices to minimize effective via-inductance.
- Use 1-kΩ to 10-kΩ pullup or
pulldown resistors for enable lines to limit noise currents in these lines
during transient events.
- Insert series pulse-proof
resistors into the A and B bus lines if the TVS clamping voltage is higher
than the specified maximum voltage of the transceiver bus pins. These
resistors limit the residual clamping current into the transceiver and
prevent it from latching up.
- While pure TVS protection is
sufficient for surge transients up to 1 kV, higher transients require
metal-oxide varistors (MOVs) that reduce the transients to a few hundred
volts of clamping voltage, and transient blocking units (TBUs) that limit
transient current to 200 mA.