SDLS146B October   1976  – September 2016 SN54LS245 , SN74LS245

 

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 3-State outputs
      2. 9.3.2 PNP Inputs
      3. 9.3.3 Hysteresis on Bus Inputs
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resource
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
  • W|20
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage 7 V
VI Input voltage(1) 7 V
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) All voltage values are with respect to GND.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC Supply voltage SN54LS245 4.5 5 5.5 V
SN74LS245 4.75 5 5.25
IOH High-level output current SN54LS245 –12 mA
SN74LS245 –15
IOL Low-level output current SN54LS245 12 mA
SN74LS245 24
TA Operating free-air temperature SN54LS245 –55 125 °C
SN74LS245 0 70

7.4 Thermal Information

THERMAL METRIC(1) SNx4LS245 UNIT
J
(CDIP)		 W
(CFP)		 FK
(LCCC)		 DB
(SSOP)		 DW
(SOIC)		 N
(PDIP)		 NS
(SO)
20 PINS 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS
RθJA Junction-to-ambient thermal resistance N/A N/A N/A 91.7 79.0 46.1 74.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 42.3(2) 70.1(2) 46.7(2) 53.1 44.4 32.1 40.4 °C/W
RθJB Junction-to-board thermal resistance 56.9(2) 109.5(2) 45.6(2) 46.8 46.9 27.0 41.7 °C/W
ψJT Junction-to-top characterization parameter N/A N/A N/A 18.9 18.0 17.6 16.9 °C/W
ψJB Junction-to-board characterization parameter N/A N/A N/A 46.4 46.3 26.9 41.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 15.9(2) 13.0(2) 6.7(2) N/A N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) MIL-STD-883 for Rth-JCx JEDEC JESD51 for Rth-JB (body not contact PCB)

7.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP(1) MAX UNIT
VIH High-level input voltage 2 V
VIL Low-level input voltage SN54LS245 0.7 V
SN74LS245 0.8
VIK Input clamp voltage VCC = MIN, II = –18 mA –1.5 V
Hysteresis
(VT+ – VT–)		 A or B VCC = MIN 0.2 0.4 V
VOH High-level output voltage VCC = MIN,
VIL = VIL(max)
VIH = 2 V,		 IOH = –3 mA 2.4 3.4 V
IOH = MAX 2
VOL Low-level output voltage VCC = MIN,
VIH = 2 V,
VIL = VIL(max)		 IOL = 12 mA 0.4 V
IOL = 24 mA SN74LS245 0.5
IOZH Off-state output current,
high-level voltage applied		 VCC = MAX,
OE at 2 V		 VO = 2.7 V 20 µA
IOZL Off-state output current,
low-level voltage applied		 VCC = MAX,
OE at 2 V		 VO = 0.4 V –200 µA
II Input current at maximum
input voltage		 A or B VCC = MAX VI = 5.5 V 0.1 mA
DIR or OE VI = 7 V 0.1
IIH High-level input current VCC = MAX, VIH = 2.7 V 20 µA
IIL Low-level input current VCC = MAX, VIL = 0.4 V –0.2 mA
IOS Short-circuit output current(2) VCC = MAX –40 –225 mA
ICC Supply current Total,
outputs high		 VCC = MAX Outputs open 48 70 mA
Total,
outputs low		 62 90
Outputs
at high Z		 64 95
(1) All typical values are at VCC = 5 V, TA = 25°C.
(2) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

7.6 Switching Characteristics

VCC = 5 V, TA = 25°C (see Figure 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output CL = 45 pF, RL = 667 Ω 8 12 ns
tPHL Propagation delay time, high- to low-level output 8 12
tPZL Output enable time to low level CL = 45 pF, RL = 667 Ω 27 40 ns
tPZH Output enable time to high level 25 40
tPLZ Output disable time from low level CL = 5 pF, RL = 667 Ω 15 25 ns
tPHZ Output disable time from high level 15 28

7.7 Typical Characteristics

VCC = 5 V, TA = 25°C, CL = 45 pF, RL = 667 Ω
SN54LS245 SN74LS245 D001_sdls146.gif Figure 1. Simulated Propagation Delay From Input to Output