ZHCSG67A March 2017 – December 2018 OPT3001-Q1
The high-limit register sets the upper comparison limit for the interrupt reporting mechanisms: the INT pin, the flag high field (FH), and flag low field (FL), as described in the Interrupt Operation, INT Pin, and Interrupt Reporting Mechanisms section. The format of this register is almost identical to the format of the low-limit register (described in the Low-Limit Register) and the result register (described in the Result Register). To explain the similarity in more detail, the high-limit register exponent (HE[3:0]) is similar to the low-limit register exponent (LE[3:0]) and the result register exponent (E[3:0]). The high-limit register result (TH[11:0]) is similar to the low-limit result (TH[11:0]) and the result register result (R[11:0]). Note that the comparison of the high-limit register with the result register is unaffected by the ME bit.
When using a manually-set, full-scale range with the mask enable (ME) active, programming the manually-set, full-scale range into the HE[3:0] bits can simplify the choice of values required to program into this register. The formula to translate this register into lux is similar to Equation 4. The full-scale values are similar to Table 8.
|LEGEND: R/W = Read/Write|
These bits are the exponent bits.
These bits are the result in straight binary coding (zero to full-scale).